How big drivers, big costs, and big risks in today’s electronics market shape the need for system-level EDA tools

We all know that the market for electronic products of all types has drastically changed over the last few years. It doesn’t necessarily look that way, but there have been significant changes. It’s been years since consumers have bought products based on what was inside. Applications software now drives many purchase decisions. However, software development often cannot begin until there’s some progress with hardware development to provide an early integration and bring-up is the major time-to-market challenge for many OEMs, and can consume as much as 50% of a project’s overall development time. System development and hardware/software integration are therefore ripe for optimization by a new generation of EDA tools.

What’s driving electronics and what’s holding things up?

What drives electronics, what drives the design of electronic products across the board has drastically changed and the drivers continue to change. Something as seemingly simple and trivial as the “Angry Birds” video game might convince a family to buy Apple’s iPad2 devices. In this case, and in many cases, a software application or applications now drive the purchase decision. The result is a different purchasing cycle and different product design-cycle and life-cycle economics.

While consumer electronics are perhaps the clearest example of this shift to applications-driven design and how we purchase and think about these devices, the trend is not limited to consumer and home electronics. Software and applications have a greater and greater impact on user experience and purchasing decisions across the board—over the entire spectrum of electronic systems. User experiences, buying habits, and design goals are changing as a result and the economics—the profitability—of system-level design is changing as a result. Both system vendors and the semiconductor industry are affected by this change as they look for ways to remain competitive in the midst of major market shifts.

Market windows are also changing.

Purchasing patterns—the way we buy all manner of products for our homes and businesses—have changed pace along with the increasingly rapid pace of product development enabled by applications-driven design.

Let’s consider the overall product development cycle. What must a device provider accomplish to meet a market deadline? Look at the new pad phenomenon as an example. The pad category didn’t exist until Apple introduced the iPad on January 27, 2010. A year later at the Consumer Electronics Show (CES), vendors rolled out more than 100 new pad products. This is a product category, a market that’s gone from nonexistent to extremely competitive in the span of a year.

Be assured, all of these products cannot succeed in this market. Some will not be competitive. Some will not make it to production. Some will arrive too late to make a difference. Note that only a handful of the pads announced at CES 2011 had actually reached the market for sales three months later.

How does a vendor, a system house, get a product to this market on time? How does a vendor get into the position of being able to announce a competitive product at CES (a very hard deadline etched in stone just like spring break, the summer vacation season, back-to-school season, the start of the American or the international football seasons, or the winter gift-giving holiday season) and then be prepared to deliver in volume to such a market at introduction or shortly thereafter?

Profitability is the key—it’s everything

Note that these are critical questions because the answers to these questions determine a product’s profitability. There’s a big profitability difference and a substantial step in the sales price for a desirable product that’s first or second in a market and being number 85. The difference is likely large enough to make the difference between a product that’s profitable and one that isn’t.

The Cadence System Development Suite

Cadence has focused on four pillars to help customers overcome these system-design challenges and to help drive the overall development cycle onto a profitable path.

In April 2010, Cadence introduced the Verification Computing Platform. This was the company’s first System Realization product announcement. It served as a cornerstone in the company’s effort to bridge the gap between the hardware- and software-development teams. The Verification Computing Platform provides a better, more efficient way for development teams to validate designs at the chip and subsystem levels.

The Verification Computing Platform allowed Cadence to start addressing some of the issues that make verification inefficient and expensive. Now Cadence is expanding its reach more fully into the System Realization space with the Cadence System Development Suite.

Today, Cadence is introducing its System Development Suite: a set of concurrent hardware/software development and verification platforms that spans the design cycle from early software development to post-RTL debugging and system integration. It supports all levels of the software stack and multiple levels of design abstraction. The goal of the suite is to lower costs and speed time-to-market by greatly accelerating system integration, system validation and bring-up times.

Unlike other approaches to system-level design, the Cadence System Development Suite provides an open, connected, and scalable set of development platforms. It’s open because it’s based on standards; it’s connected because it allows easy migration between platforms; and its scalability allows design teams to select the proper EDA tools to meet the performance, capacity and software distribution volume needs of present and future electronic systems. The System Development Suite provides key enabling technologies for System Realization and the tools in the suite represent significant advances for realizing the EDA360 vision.

Key components of the System Development Suite are:

  • The Virtual System Platform: a standards-based virtual prototyping solution—based on SystemC and TLM models—that enables early software development at the architectural level. The Virtual System Platform provides system-analysis and -optimization tools and offers design teams a superior alternative to expensive silicon prototyping reference boards that are often distributed to software developers.
  • The Palladium XP Verification Computing Platform: provides RTL acceleration, emulation, and simulation. A “hot swap” capability allows instant migration between these technologies so that the system-level development team can quickly move from task to task without retooling designs for different models .
  • The Rapid Prototyping Platform: consists of FPGA-based prototyping boards with a prototyping capacity of as much as 30 million ASIC gates capacity and complementary software that enables fast design implementation, automatic multi-FPGA partitioning, and fast debugging.
  • The Incisive Verification Platform: a family of verification tools optimized for block-level verification with a particular focus on RTL testbench simulation. The Incisive Verification Platform supports many standard languages including Specman/e, SystemVerilog, and SystemC. It also supports UVM (the Universal Verification Methodology).

All four platforms within the Cadence System Development Suite are designed to work well together. The first three platforms also leverage components within the Incisive Verification Platform.

The Cadence System Development Suite plays a key role in supporting System Realization and fully realizing the EDA360 vision, which is a holistic approach to top-down system, silicon, package, and board-level design. The suite helps set the stage for a new era of application-driven, software-rich system design that brings fresh innovation and creativity to the electronics industry.

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About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at http://eda360insider.wordpress.com/)
This entry was posted in EDA360, System Realization. Bookmark the permalink.

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