3D Thursday: Mark LaPedus writes overview of the 3D IC landscape

Briefly noted: Over at the Semiconductor Manufacturing & Design Community, Senior Editor Mark LaPedus has just published an article that’s a good review of the various challenges to 3D IC adoption including:

  • Known good die
  • Testability
  • Design for test
  • Standards for testing

Click here for the article.

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About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at http://eda360insider.wordpress.com/)
This entry was posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization and tagged , , , . Bookmark the permalink.

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