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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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- 39 low-cost boards for embedded Linux application development starting with Raspberry Pi. Want the list?
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Want a peek at a possible Qualcomm 3D IC roadmap?
- Qualcomm renames existing ARM-based Snapdragon mobile application processors and provides future roadmap
- 3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. Can you say “Tour de Force”?
- How about a quick and easy guide to ARM Cortex processor cores? Got one for you from ARM TechCon 2011
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- Nvidia Tegra 3 based on five ARM Cortex-A9 cores is mobile processor of the year declares Microprocessor Report
- Friday Video: Webcam + Open-source video code + Arduino Uno microcontroller board + pan/tilt servo make automated face-tracker, prove the power of an apps-centric world
- The DDR4 SDRAM spec and SoC design. What do we know now?
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Tag Archives: Design rule checking
20nm design: What have we learned so far?
Even if you are not currently considering 20nm design, you owe it to yourself to download and read a new 9-page White Paper titled “A Call to Action: How 20nm Will Change IC Design” to learn about some tectonic shifts … Continue reading
Who else wants to see a 60x speedup in DFM signoff on a 28nm design?
Rambus has announced that it achieved a 60x speedup in DRC for an IP design targeting a 28nm process technology using GLOBALFOUNDRIES’ DRC+ methodology. This approach to DRC is interesting because it’s the industry’s first approach to DRC that teams … Continue reading
Posted in EDA360, Globalfoundries, Silicon Realization
Tagged 28nm, 32nm, Design rule checking, DRC, IP, Rambus
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