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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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- 39 low-cost boards for embedded Linux application development starting with Raspberry Pi. Want the list?
- How about a quick and easy guide to ARM Cortex processor cores? Got one for you from ARM TechCon 2011
- 3D Thursday: A look at some genuine 3D NAND cells, courtesy of Micron
- Nvidia Tegra 3 based on five ARM Cortex-A9 cores is mobile processor of the year declares Microprocessor Report
- Freescale starts sampling $0.49 Kinetis L microcontrollers based on ARM Cortex-M0+ processor core
- Friday Video: Circuit simulation app for Android. SPICE for $10, runs in your hand? Well, almost.
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- 3D Thursday: Power is a killer app for TI’s PowerStack 3D packaging—parasitics vanish
- Raspberry Pi + Canon = Camera Pi: ARM 11 and Linux hack of a Canon 5D Mk II DSLR
- The DDR4 SDRAM spec and SoC design. What do we know now?
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Tag Archives: DFI
What’s it take to design DDR4 into your next SoC? Newly released DFI 3.0 Spec opens the flood gates for DDR4 design
DDR4 SDRAM probably won’t be appearing until 2013 and probably won’t become the mainstream SDRAM technology until 2015 (updated estimates from “Memory to processors: “Without me, you’re nothing.” DDR4 is on the way.”) but the new DFI 3.0 preliminary specification … Continue reading
Posted in EDA360, Memory, Silicon Realization, SoC Realization
Tagged DDR4, DFI, SDRAM
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