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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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2.5D 3D 20nm 28nm Altera Analog Android Apple ARM ARM architecture ASIC Cadence Cortex-A15 Cortex-M0 DAC Dave Jones EDA EDPS FinFET Flash FPGA Freescale Freescale Semiconductor GlobalFoundries IBM Intel iPhone Jim Hogan Linux Low Power microcontroller Micron Microsoft Mixed Signal Nvidia Qualcomm Samsung SDRAM SoC STMicroelectronics Texas Instruments TSMC USB verification XilinxTop Posts
- 39 low-cost boards for embedded Linux application development starting with Raspberry Pi. Want the list?
- Want a peek at a possible Qualcomm 3D IC roadmap?
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Qualcomm renames existing ARM-based Snapdragon mobile application processors and provides future roadmap
- 3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. Can you say “Tour de Force”?
- How about a quick and easy guide to ARM Cortex processor cores? Got one for you from ARM TechCon 2011
- Nvidia Tegra 3 based on five ARM Cortex-A9 cores is mobile processor of the year declares Microprocessor Report
- Friday Video: Webcam + Open-source video code + Arduino Uno microcontroller board + pan/tilt servo make automated face-tracker, prove the power of an apps-centric world
- The DDR4 SDRAM spec and SoC design. What do we know now?
- 3D Thursday: Wide I/O and TSVs have a ripple effect on the DRAM controller. Who knew?
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Tag Archives: Integrated circuit
Workshop on Analog and Mixed-Signal Design Automation: November 8 in Silicon Valley
A 1-day workshop on Analog and Mixed-Signal Design Automation will be held on November 8 in conjunction with ICCAD in Silicon Valley. It’s no secret that advanced-node process scaling makes all IC design more complex and more challenging—even more so … Continue reading
3D Thursday: Will water cooling for 3D IC assemblies ever be practical?
Last week, Brian Bailey published an interview with Professor Madhavan Swaminathan who is the Director of the Interconnect and Packaging Center (IPC) at Georgia Tech in Atlanta. The topic of the interview was cooling of 3D IC devices. It’s no … Continue reading
Posted in System Realization, EDA360, SoC Realization, Silicon Realization, 3D, SoC, 2.5D
Tagged IBM, 3D, 2.5D, Integrated circuit, Brian Bailey, Aquasar, SuperMUC, Water cooling, FLOPS
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20nm design: What have we learned so far?
Even if you are not currently considering 20nm design, you owe it to yourself to download and read a new 9-page White Paper titled “A Call to Action: How 20nm Will Change IC Design” to learn about some tectonic shifts … Continue reading
Friday Video: Mr. 3D IC, Herb Reiter, speaks about his start with 3D, where it is, where it’s going
I conducted this video interview with Herb Reiter, “Mr. 3D IC” and president of eda2asic, the day after he spoke at a MEPTEC lunch in Silicon Valley—see “3D Thursday: The “King of 3D ICs” (Herb Reiter) speaks to his subjects—‘Learn … Continue reading
ISQED: Why does a trailing-edge digital IC process = a leading-edge analog IC process? TI’s Dr. Venu Menon lays bare the secrets of the analog IC business
“What can you do with bits?” asked Dr. Venu Menon, VP of Analog Technology Development at Texas Instruments at the beginning of his keynote talk at last week’s ISQED. Then he answered his own question: “Nothing without analog,” because analog … Continue reading
