Search EDA360 Insider
Hey!!! Subscribe now to the EDA360 Insider!
-
Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
EDA360 Tag Cloud
2.5D 3D 20nm 28nm Altera Analog Android Apple ARM ARM architecture ASIC Cadence Cortex-A15 Cortex-M0 DAC Dave Jones EDA EDPS FinFET Flash FPGA Freescale Freescale Semiconductor GlobalFoundries IBM Intel iPhone Jim Hogan Linux Low Power microcontroller Micron Microsoft Mixed Signal Nvidia Qualcomm Samsung SDRAM SoC STMicroelectronics Texas Instruments TSMC USB verification XilinxTop Posts
- 39 low-cost boards for embedded Linux application development starting with Raspberry Pi. Want the list?
- Want a peek at a possible Qualcomm 3D IC roadmap?
- How about a quick and easy guide to ARM Cortex processor cores? Got one for you from ARM TechCon 2011
- Nvidia Tegra 3 based on five ARM Cortex-A9 cores is mobile processor of the year declares Microprocessor Report
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- 3D Thursday: A look at some genuine 3D NAND cells, courtesy of Micron
- 3-processor SoC for digital still cameras incorporates an ARM 1136J-S RISC processor core plus separate image and video processors
- 3D Thursday: Generation-jumping 2.5D Xilinx Virtex-7 2000T FPGA delivers 1,954,560 logic cells using 6.8 BILLION transistors (UPDATED!)
- How Skyera developed the 44Tbyte, enterprise-class Skyhawk SSD from the ground up. A System Realization story.
- Raspberry Pi + Canon = Camera Pi: ARM 11 and Linux hack of a Canon 5D Mk II DSLR
Download the EDA360 Vision Paper here:
Tag Archives: PCIe Gen3
Intel’s Knut Grimsrud explains how to get another 20x improvement in SSD performance
“The coolest consumer devices use NVM (non-volatile memory)” said Intel Fellow Knut Grimsrud, who gave a keynote speech at this week’s Flash Memory Summit http://www.flashmemorysummit.com. We’ve seen SSD (solid-state disk) performance advances on the order of 20x from 2005 through … Continue reading
Detailed analysis of the Cadence PCIe Gen 3 IP and VIP launch from SemiWiki’s Eric Esteve
A bit of analysis and a little history goes a long way to fleshing out the product announcement of Cadence’s PCIe Gen 3 IP and VIP offerings. This just-published analysis by SemiWiki’s Eric Esteve provides both.
Posted in EDA360, IP, SoC Realization, Verification
Tagged PCIe, PCIe Gen 3, PCIe Gen3
Leave a comment
