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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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2.5D 3D 20nm 28nm Altera Analog Android Apple ARM ARM architecture ASIC Cadence Cortex-A15 Cortex-M0 DAC Dave Jones EDA EDPS FinFET Flash FPGA Freescale Freescale Semiconductor GlobalFoundries IBM Intel iPhone Jim Hogan Linux Low Power microcontroller Micron Microsoft Mixed Signal Nvidia Qualcomm Samsung SDRAM SoC STMicroelectronics Texas Instruments TSMC USB verification XilinxTop Posts
- 39 low-cost boards for embedded Linux application development starting with Raspberry Pi. Want the list?
- Friday Video: Two more low-cost, ARM-based, embedded-Linux development boards from ODROID and Google
- Nvidia Tegra 3 based on five ARM Cortex-A9 cores is mobile processor of the year declares Microprocessor Report
- Collaboration is key to making DFM work at 28nm and below
- 3D Thursday: Altera adds Avago MicroPOD optical interconnects to FPGA package to handle bidirectional 100Gbps Ethernet
- How about a quick and easy guide to ARM Cortex processor cores? Got one for you from ARM TechCon 2011
- Xilinx 28nm low-power SoC design class, part 2: Process Technology
- Go for the GHz? 8-core, Bulldozer-based AMD FX processor hits 8.429 GHz using liquid nitrogen and liquid helium!
- 3D Thursday: Micron to present Hybrid Memory Cube status at EDPS in Monterey, April 6—there’s a lot of news
- Friday Video: A blast from the past. Handifax 1000 promo video from mid 1990s shows how far we’ve come
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Tag Archives: Richard Goering
3D Thursday: What the Cadence purchase of signal- and power-integrity EDA toolmaker Sigrity means for 2.5D and 3D IC assembly
Richard Goering has just published an in-depth analysis in his Industry Insights blog that explains what the Cadence purchase of signal- and power-integrity EDA toolmaker Sigrity means for pcb and IC package designers. Goering quotes Brad Griffin, product marketing director … Continue reading
Posted in 2.5D, 3D
Tagged Printed circuit board, Richard Goering, Sigrity, Cadence Design Systems, Goering, Integrated circuit packaging
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This just out from DAC 2012: video interview with EDA bloggers Goering and Leibson on IP subsystems, 20nm, and more
Want to know what’s going to happen at DAC 2012? Oh, wait, that was a couple of weeks ago. Which is how long it took to get post this video of EDA bloggers Richard Goering and Steve Leibson from a … Continue reading
Posted in 20nm, 28nm, DAC, EDA360, Silicon Realization, SoC, SoC Realization, System Realization
Tagged DAC, Design Automation Conference, Richard Goering, Steve Leibson
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Are you preparing for 20nm design? This FREE On-Demand Webinar can help.
Last week ARM, TSMC, and Cadence held a Webinar on 20nm design covering three main points: Its adoption is inevitable. The design and manufacturing challenges are significant. The challenges are manageable given the right tools and methodologies, and solutions are … Continue reading
Posted in 20nm, EDA360, Silicon Realization
Tagged 20nm, ARM, Cadence, Richard Goering, Silicon Realization, TSMC
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Four Significant EDA technologies of 2011 and what they mean to your IC design team
This week, Cadence celebrated the efforts of several developers who have created some very innovative technology during a private award ceremony. The reason I’m mentioning this internal event at all is because these celebrated technologies are already having a profoundly … Continue reading
