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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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- 39 low-cost boards for embedded Linux application development starting with Raspberry Pi. Want the list?
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Want a peek at a possible Qualcomm 3D IC roadmap?
- The DDR4 SDRAM spec and SoC design. What do we know now?
- How about a quick and easy guide to ARM Cortex processor cores? Got one for you from ARM TechCon 2011
- Friday Video: Webcam + Open-source video code + Arduino Uno microcontroller board + pan/tilt servo make automated face-tracker, prove the power of an apps-centric world
- Friday Video: Two more low-cost, ARM-based, embedded-Linux development boards from ODROID and Google
- 3D Thursday: Power is a killer app for TI’s PowerStack 3D packaging—parasitics vanish
- ARM Cortex-A15—does this processor IP core need a new category…Superstar IP?
- 3D Thursday: More on the Xilinx Virtex 7 with 2.5D tiling. Wave of the future or stopgap measure?
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Tag Archives: Tensilica
3D Thursday: Some unexpected implications of IP subsystems coupled with 3D IC assembly
A new “Experts at the Table” conversation on the Semiconductor Manufacturing and Design Community (SMD) site about IP Subsystems among Kevin Meyer, vice president of design enablement strategy and alliances at GlobalFoundries; Steve Roddy, vice president of marketing at Tensilica; … Continue reading
Posted in 3D, EDA360
Tagged 3D IC, Atrenta, GlobalFoundries, IP Subsystems, Tensilica
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