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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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2.5D 3D 20nm 28nm Altera Analog Android Apple ARM ARM architecture ASIC Cadence Cortex-A15 Cortex-M0 DAC Dave Jones EDA EDPS FinFET Flash FPGA Freescale Freescale Semiconductor GlobalFoundries IBM Intel iPhone Jim Hogan Linux Low Power microcontroller Micron Microsoft Mixed Signal Nvidia Qualcomm Samsung SDRAM SoC STMicroelectronics Texas Instruments TSMC USB verification XilinxTop Posts
- 39 low-cost boards for embedded Linux application development starting with Raspberry Pi. Want the list?
- Friday Video: Webcam + Open-source video code + Arduino Uno microcontroller board + pan/tilt servo make automated face-tracker, prove the power of an apps-centric world
- Friday Video: Two more low-cost, ARM-based, embedded-Linux development boards from ODROID and Google
- How about a quick and easy guide to ARM Cortex processor cores? Got one for you from ARM TechCon 2011
- 3D Thursday: Power is a killer app for TI’s PowerStack 3D packaging—parasitics vanish
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- 3D Thursday: More on the Xilinx Virtex 7 with 2.5D tiling. Wave of the future or stopgap measure?
- Want a peek at a possible Qualcomm 3D IC roadmap?
- Agilent knocks one out of the park with new, low-cost line of digital scopes—a very competitive entry into the low-end DSO market and a perfect example of EDA360 design using end-to-end design and apps.
- ARM Cortex-A15—does this processor IP core need a new category…Superstar IP?
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Tag Archives: Three-dimensional integrated circuit
Friday Video: Mr. 3D IC, Herb Reiter, speaks about his start with 3D, where it is, where it’s going
I conducted this video interview with Herb Reiter, “Mr. 3D IC” and president of eda2asic, the day after he spoke at a MEPTEC lunch in Silicon Valley—see “3D Thursday: The “King of 3D ICs” (Herb Reiter) speaks to his subjects—‘Learn … Continue reading
3D Thursday: The “King of 3D ICs” (Herb Reiter) speaks to his subjects—“Learn to work together”
Mr. 3D IC—aka Herb Reiter—spoke to an attentive group of packaging experts about the state of 3D IC technical and business development today at a MEPTEC luncheon held at the “luxurious” Biltmore Hotel in cental Silicon Valley. I’ve written about … Continue reading
Posted in 2.5D, 3D, DAC, EDA360, Low Power, Packaging, Silicon Realization, SoC, SoC Realization, System Realization, Wide I/O
Tagged 2.5D, 3D, Herb Reiter, IBM, Reiter, Three-dimensional integrated circuit, TSMC, Xilinx
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3D Thursday: 3D IC success stories—a DAC panel. June 7
What better way to understand the realities of 3D IC assembly than to listen to the pioneers who have already taken the arrows so you won’t have to? That’s the topic of the upcoming DAC panel: “Is 3-D Ready for … Continue reading
Posted in 2.5D, 3D, EDA360, Silicon Realization
Tagged 2.5D, 3D, Cadence, IBM, Intel, Three-dimensional integrated circuit, TSMC, Xilinx
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3D Thursday: Qualcomm’s Nick Yu says “3D DRAM stacking has started—it’s shipping in products”
Today’s GSA Silicon Summit held at the Computer History Museum in Mountain View, California included a talk on 3D IC assembly by Nick Yu, VP of Engineering, VLSI Engineering, at Qualcomm. Yu is in charge of Qualcomm’s technology roadmaps including … Continue reading
Posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization
Tagged DDR SDRAM, GPU, JEDEC, SDRAM, Three-dimensional integrated circuit, Wide I/O
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