Tag Archives: TSMC

Is 28nm really here? Now? When?

Last week at the Gartner Semiconductor Briefing held at the Doubletree Hotel in San Jose, Gartner Research Director Sam Wang presented a forecast for the way new IC process technologies will diffuse into the manufacturing mix. The chart he presented … Continue reading

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Gartner’s Sam Wang tosses down the 28nm Silicon Realization gauntlet to IC design houses

Sam Wang may have been a Gartner analyst for only six months or so, but he’s already learned how to drop a stunner on the audience. The event was today’s Gartner Semiconductor briefing at the San Jose Doubletree Hotel near … Continue reading

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3D Thursday: MEMS is yet another kind of 3D. EDA entrepreneur Jim Hogan speaks about MEMs.

Yesterday, Cadence hosted a mini conference on MEMS (microelectromechanical systems) with MEMS EDA vendor Coventor. EDA Investor and industry gadabout Jim Hogan gave the keynote and Coventor VP of engineering Steve Breit filled the audience in on some technical details. … Continue reading

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3D Thursday: Intel and FinFETs (Tri-Gate transistors)—a different kind of 3D

Earlier this month, Intel announced that it will be using Tri-Gate transistors (FinFETs) to build microprocessors at the 22nm process node. The microprocessor is code-named “Ivy Bridge.” It will be a 22nm version of the company’s Sandy Bridge processor and … Continue reading

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Chairman and CEO Morris Chang provides a semiconductor industry view of 28nm, 3D, and market drivers at TSMC’s Technology Day

EETimes’ Mark LaPedus has just published an article covering today’s remarks made by TSMC’s Chairman and CEO Morris Chang at the company’s Technology Day. Among the most significant ones in my opinion: PCs and then cell phones have been the … Continue reading

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Daniel Nenni’s 100th blog. (It’s about TSMC, no surprise)—Congratulations to Daniel

Strategic Foundry Relationship expert and industry blogger Daniel Nenni has just published the hundredth entry in his Silicon Valley Blog. The topic is TSMC’s recent conference and Nenni, who writes a lot about TSMC, dishes up some cogent analysis and … Continue reading

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System Realization: Free Webinars. Everyone likes them.

EDA360 defines System Realization as the development of complete hardware/software platforms ready for applications development even before the chip is designed. Cadence offers many free Webinars—both live and archived—that you might find useful. Here are a few Webinars related to … Continue reading

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LSI Corp to host IC innovation conference and technology showcase in Milpitas next week

On October 5 through 7, LSI Corp will be hosting an IC conference and technology showcase in at the beautiful Crowne Plaza Hotel in suburban Milpitas, just north of San Jose (www.lsi.com/AI-conference). Allow me to especially point you to two … Continue reading

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An ESL reference flow for TSMC

Yesterday, Richard Goering published a blog about an ESL reference flow, which is now part of Reference Flow 11.0 that TSMC introduced last June. The ESL reference flow is a validated path for high-level descriptions that produces designs through the … Continue reading

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