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- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
EDA360 Tag Cloud2.5D 3D 20nm 28nm Altera Analog Android Apple ARM ARM architecture ASIC Cadence Cortex-A15 Cortex-M0 DAC Dave Jones EDA EDPS FinFET Flash FPGA Freescale Freescale Semiconductor GlobalFoundries IBM Intel iPhone Jim Hogan Linux Low Power microcontroller Micron Microsoft Mixed Signal Nvidia Qualcomm Samsung SDRAM SoC STMicroelectronics Texas Instruments TSMC USB verification Xilinx
- 39 low-cost boards for embedded Linux application development starting with Raspberry Pi. Want the list?
- Nvidia Tegra 3 based on five ARM Cortex-A9 cores is mobile processor of the year declares Microprocessor Report
- How about a quick and easy guide to ARM Cortex processor cores? Got one for you from ARM TechCon 2011
- Want a peek at a possible Qualcomm 3D IC roadmap?
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- Raspberry Pi + Canon = Camera Pi: ARM 11 and Linux hack of a Canon 5D Mk II DSLR
- 3-processor SoC for digital still cameras incorporates an ARM 1136J-S RISC processor core plus separate image and video processors
- The DDR4 SDRAM spec and SoC design. What do we know now?
- 3D Thursday: A look at some genuine 3D NAND cells, courtesy of Micron
- How Skyera developed the 44Tbyte, enterprise-class Skyhawk SSD from the ground up. A System Realization story.
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Tag Archives: TSV
Last Friday, I moderated an all-star, hand-picked 3D-IC panel at the Electronic Design Process Symposium (EDPS) in Monterey, California. The panel included: Phil Marcoux, Managing Director, PPM Associates, experienced packaging expert Herb Reiter, President of eda2asic, Chair of the Global … Continue reading
Dr. Venu Menon, VP of Analog Technology Development at TI, gave a deeply informative lunchtime keynote speech at this week’s ISQED Symposium. Most of Menon’s presentation discussed analog process technology: what’s important to analog chip design and manufacturing, what’s changed … Continue reading
A recent email from Marc Greenberg, Director of Product Marketing for the Cadence Design IP Group, suggested that Wide I/O used in a 3D stack is free for the end user. In other words, there’s no incremental cost in the … Continue reading
ElectroIQ reports that CEA-Leti in Grenoble has just launched an Open 3D IC program to permit companies more open access to the 3D IC assembly technologies developed at the research center. Last December, CEA-Leti and ST-Ericsson made a joint presentation … Continue reading
3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. Can you say “Tour de Force”?
Yesterday, at the RTI 3D Conference, Pascal Vivet from CEA-Leti and Vincent Guérin from ST-Ericsson unveiled a 3D IC project that represents a real Tour de Force of cutting-edge system technology. The quest starts with a key question: “What’s the … Continue reading
This week, IBM and Micron apparently made a joint announcement (or perhaps just IBM made an announcement) regarding the manufacture of Micron’s Hybrid Memory Cube. There are varying reports and I cannot find the original statements on either company’s Web … Continue reading