An ESL reference flow for TSMC

Yesterday, Richard Goering published a blog about an ESL reference flow, which is now part of Reference Flow 11.0 that TSMC introduced last June. The ESL reference flow is a validated path for high-level descriptions that produces designs through the use of virtual platforms, transaction-level models (TLMs), and high-level synthesis. This new ESL reference flow introduces models for power, performance, and area along with ESL-to-RTL verification to permit more meaningful design tradeoffs with ESL designs. Richard interviewed Ashok Mehta, senior manager for design and technology platforms at TSMC, and this blog is a result of that interview.

About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at https://eda360insider.wordpress.com/)
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