An ESL reference flow for TSMC

Yesterday, Richard Goering published a blog about an ESL reference flow, which is now part of Reference Flow 11.0 that TSMC introduced last June. The ESL reference flow is a validated path for high-level descriptions that produces designs through the use of virtual platforms, transaction-level models (TLMs), and high-level synthesis. This new ESL reference flow introduces models for power, performance, and area along with ESL-to-RTL verification to permit more meaningful design tradeoffs with ESL designs. Richard interviewed Ashok Mehta, senior manager for design and technology platforms at TSMC, and this blog is a result of that interview.

About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at
This entry was posted in EDA360, System Realization and tagged , , . Bookmark the permalink.

Leave a Reply

Fill in your details below or click an icon to log in: Logo

You are commenting using your account. Log Out /  Change )

Google photo

You are commenting using your Google account. Log Out /  Change )

Twitter picture

You are commenting using your Twitter account. Log Out /  Change )

Facebook photo

You are commenting using your Facebook account. Log Out /  Change )

Connecting to %s