System Realization: Hardware/Software codesign

Ann Steffora Mutschler just published a meaty article on “Best Practices For Multicore SoC Test And Debug” at Chip Design Magazine’s System-Level Design Community. The article quotes Jason Andrews, an architect at Cadence Design Systems, who says that “multicore debug is a huge issue. It isn’t easy to do, and there aren’t many good ways to do it.”

Further, the article quotes Andrews as saying “As you look at homogeneous multicore [System Realizations] where you just are adding compute resources and you basically don’t have any dependency of the functions running on those cores between each other, there’s not much challenging there. Every core does the same thing in principle … The challenges come in when you do heterogeneous multicore [System Realization] and you are trying to distribute functions across those cores. Now you have very intricate dependencies.”

Andrews concluded by saying that multicore system developers “want somebody to come with the tools, with a good library of models and connections to the right IP providers but then they also want to have something they can extend and work with.”

This discussion goes deep into the heart of the EDA360 vision’s concept of System Realization. Getting blocks of code to interact in meaningful ways that help system-level developers make key architectural decisions is an important step towards making the entire System Realization process more deterministic. It is this hardware/software codesign effort that System Realization will streamline with better models and system simulation/emulation.

About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at https://eda360insider.wordpress.com/)
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