3D Conference next week in San Francisco, coming to a high-volume, high-performance product near you

There’s a low-profile, high-content 3D IC conference taking place next week adjacent to the San Francisco Airport in Burlingame, California. The event runs from December 8-10 and includes several sessions you’ll want to see if you’re at all connected to the 3D packaging revolution now occurring in high-volume, high-performance products near you.

A couple of keynote presentations that caught my eye are:

  • “3D Integration for High-Performance System Applications” presented by Subramanian Iyer, IBM Fellow
  • “TSV Challenges and Opportunities—A Wafer Foundry View” presented by Douglas Chen-Hua Yu, Senior Director of Integrated Interconnect and Packaging at TSMC

Another interesting presentation:

  • “Progress in 3D Commercialization” presented by Robert Patti, CTO of Tezzaron Semiconductor

There’s an entire session of 3D interposers with some notable presentations including:

  • “3D Silicon/Glass Interposers: Myth, Niche, or High-Volume Opportunities?” presented by Jean-Marc Yannou, Market and Technology Analyst at Yole Developpement
  • “Key Enabling Technologies for 3D TSV Interposer Applications” presented by Yi-Jen Chan, VP and EOL Director at ITRI

You can get more information at http://techventure.rti.org/Winter2010/pdf/InviteWinter10.pdf


About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at https://eda360insider.wordpress.com/)
This entry was posted in EDA360, Silicon Realization and tagged . Bookmark the permalink.

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