In a move characterized as “not a material financial matter,” FPGA vendor Altera has announced the purchase of Avalon Microelectronics, a Canadian vendor of FPGA-centric IP used to design optical networking equipment. Networking has long been a mainstay application for FPGAs and so this IP acquisition makes a lot of sense for Altera. Avalon’s IP seems to focus on FEC (forward error correction, also known as “channel coding”) algorithms used in optical networking. (FEC algorithms are also big in digital cellular telephony.) Avalon’s FEC IP includes a long list of specialized algorithms unique to optical network design. The company has also put together “virtual ASSPs,” which are complete FPGA-based designs for transponders, multiplexers, and “muxponders” for 100G networks and down.
When a general vendor like Altera takes aim at a niche market such as optical networking, a strategic IP acquisition like this one can make a lot of sense. In today’s design environment, time to market and time to revenue always loom large in make-versus-buy decisions for IC and equipment designers and pre-designed, pre-tested, pre-certified IP helps get to market faster both by accelerating design and by accelerating type acceptance with respect to standards interoperability.
Widespread adoption of IP in all of the many flavors of electronic design is not only inevitable, it’s already happened. All commercial SoCs being designed today incorporate some commercial IP, even if it’s only a processor. Increasingly, the commercial IP also includes memory cores, DSPs, interface cores, and verification IP to test standards compliance. Today, IP is as integral to chip design as EDA. The two elements are now and forever intertwined. It’s all part of the EDA360 vision.