Samsung DRAM combines 3D TSVs and wide I/O to move 12.8 Gbytes/sec. Is this the 3D revolution?

As reported in Korea IT Times, Samsung rolled out a “50nm class” 1Gbit mobile DRAM with wide I/O capable of a 12.8Gbytes/sec transfer rate at last week’s ISSCC. The key to achieving a transfer rate that’s 8x faster than conventional mobile DDR DRAM and 4x faster than LPDDR2 is the use of wide I/O paths. In this case, the DRAM interface uses 512 pins for data transfer instead of the conventional 32-pin design. Conventional DRAM packaging cannot achieve such an I/O density, Samsung uses microbumps and TSVs (through-silicon vias) to permit 2.5D assembly and full 3D packaging with device stacking, for even better volumetric efficiency.

The introduction of this DRAM won’t immediately create a “3D revolution” in Silicon or System Realization. However, Samsung’s introduction of a 3D-specific DRAM for mobile applications is yet another signpost, or perhaps a billboard, on the road to the packaging revolution now underway.

About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at
This entry was posted in EDA360, Packaging, Silicon Realization, System Realization. Bookmark the permalink.

Leave a Reply

Fill in your details below or click an icon to log in: Logo

You are commenting using your account. Log Out /  Change )

Google photo

You are commenting using your Google account. Log Out /  Change )

Twitter picture

You are commenting using your Twitter account. Log Out /  Change )

Facebook photo

You are commenting using your Facebook account. Log Out /  Change )

Connecting to %s