Peeling back the layers of the onion that’s Apple’s A5 processor for the iPad2

Today’s EE Times story about the Apple’s A5 processor, first introduced with the Apple iPad2, peels away some of the layers of the onion (the A5 processor) without revealing all. Think of this article as a high-tech version of the dance of the seven veils. The authors, Paul Boldt and Don Scansen, are a couple of high-tech Canadian consultants and I find many of their insights quite interesting. Here are some quoted highlights of the article:

“…the A5 die is dramatically larger than the A4. Both UBM Techinsights and Chipworks found the A5 die to be  12.1 mm x 10.1 mm, giving a die size of 122 mm2. This compares to 53 mm2 for the A4. The die size of the A5 is therefore 2.3 x larger than the A4.”

“The two ARM cores of the A5 combine to consume approximately 14 percent of the total die area. This is the roughly the same percentage as the single ARM core in the A4.” (Yet both chips are said to be produced in with the same Samsung 45nm IC process technology.)

“The somewhat simplified area analysis indicates that there is more to the increased die area than just the upgraded and expanded CPU+GPU and the arbitration circuitry.”

“The A5 is a second generation chip whose design evolved—or should have—with intimate knowledge of the software stack that will run on it.”

“Silicon that is wasted if the circuit is not used by the software. It all hinges on knowing the structure of the software and its roadmap. With that type of insider knowledge, a designer can hammer that functionality down to the bare metal.”

And finally, a statement that goes to the heart of the EDA360 vision and philosophy:

“Apple is well aware of the costs of such a large SoC, but decided the overall system performance gains justify the increase in silicon. Is it also possible that the design has lowered other silicon, system or power consumption burdens?  The point is that we need to consider the entire system.”

The A5’s dance of the seven veils is not done. There are certain to be more detailed teardown articles in the future. When there are, if they are worthy of your attention, you’ll find them noted here at the EDA360 Insider.

Steve Leibson, EDA360 Evangelist


About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at
This entry was posted in ARM, EDA360, Silicon Realization, SoC Realization, System Realization and tagged , , . Bookmark the permalink.

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