Urgent: You have only 24 hours to sign up for a free DDR4 Webinar including just-released info from the JEDEC committee

I just heard from the Cadence memory interface guru himself, Marc Greenberg, about a DDR4 Webinar he’s giving tomorrow (Thursday) during the EETimes Virtual SoC event.

Here’s what Marc wrote:

“I am presenting a Webinar on DDR4 tomorrow (Thursday) at 3PM Eastern / 2PM Austin / Noon PST as part of an EETimes virtual conference. We were very fortunate that a lot of the confidential information on DDR4 became public at a JEDEC presentation at Memcon/CDNLive! EMEA just last week. I have basically rolled all the public information plus some predictions and market analysis into a 1-hour webinar.”

DDR4 is, of course, the latest JEDEC DDR spec for high-speed synchronous DRAM. DDR3 is just coming into its own now with DDR2 making a slow fade so its time to start designing new chips and board-level systems for DDR4. Get the absolute latest info on DDR4 at this Webinar.

Register here.  Quick! Like now!!!

About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at https://eda360insider.wordpress.com/)
This entry was posted in EDA360, IP, Memory and tagged , , , . Bookmark the permalink.

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