Detailed analysis of the Cadence PCIe Gen 3 IP and VIP launch from SemiWiki’s Eric Esteve

A bit of analysis and a little history goes a long way to fleshing out the product announcement of Cadence’s PCIe Gen 3 IP and VIP offerings. This just-published analysis by SemiWiki’s Eric Esteve provides both.

About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at https://eda360insider.wordpress.com/)
This entry was posted in EDA360, IP, SoC Realization, Verification and tagged , , . Bookmark the permalink.

Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s