Earlier this week, AMD launched the Radeon E6460 embedded GPU (graphics processor, see photo below). It’s an entry-level GPU with more than 2x the performance of the previous-generation Radeon E2400 GPU. To get the desired performance from this GPU—it’s capable of driving four displays simultaneously—AMD elected to use a BGA with the flip-chip GPU die bonded to the BGA package and there are two soldered GDDR5 high-performance graphics SDRAMs on the BGA as well. Thus we have a 3D multichip module (MCM) with the three semiconductor devices bonded to a BGA package that serves as an electrical interposer between the three chips.
MCM assembly as a form of 3D assembly has been around for a good , long time dating back to some of the earliest DRAMs in the late 1970s (like the pre-256K Mostek 4332D 128Kbit DRAM circa 1979). We don’t necessarily consider that sort of thing to be 3D assembly here and now in the 21st century, but it most certainly is. As the AMD E6460 GPU press release says: “The 512 MB GDDR5 frame buffer included in the BGA package provides high memory bandwidth while reducing the total footprint of the platform solution and the effort needed to design and maintain the system over time.” There are still big advantages to be gleaned from 3D IC-packaging technology that’s more than 30 years old.
But there’s a second, really subtle application of 3D assembly that you might possibly miss so I want to highlight it. I completely missed it until I looked twice at the photo of the E6460 GPU. If you look closely, you’ll see that the flip-chip GPU chip on the BGA package has a second, slightly smaller chip mounted on top of it. With 3D Thursday coming up, I had to ask AMD what I was seeing. Was this an early use of stacked-die 3D assembly? Did that second die add some sort of new function?
The answer is that the second die is indeed bonded to the first but it is electrically inert. It’s an unpatterned silicon die (except for the laser-etched printing on the top). There are no electrical connections between this second die and the GPU. I guess I have too little imagination in this third dimension because I could not think of a reason why you might go to the extra cost and effort to glue a second piece of electrically inert silicon onto an active die. So I asked AMD about that.
The answer surprised me. It might surprise you too.
It’s a thermal spacer to bring the bare GPU die up to the height of the two GDDR5 SDRAMs. The thermal spacer allows a heat sink or fan sink to sit flat on top of the GPU die and the two SDRAM chips. That was sure an “Aha!” moment for me and it’s yet another, unexpected example of how 3D assembly is becoming increasingly useful.