Printed-circuit board technology is undergoing rapid change and there are several new challenges to overcome. Some of these challenges include:
- Multi-GHz differential-pair signal distribution
- Complex power-distribution with multiple voltages and high-speed, high-current delivery requirements
- Ever-escalating ASIC, SoC, and FPGA pin counts with attendant routability challenges from chip to package to board
- Components embedded in the pcb itself
Chances are, your Realization teams have encountered one or more of these challenges. Perhaps several. Perhaps all of them. If so, this is your chance to get a look at some really powerful new tools and additional automation to help you tackle those challenges.
Cadence’s latest Technology on Tour Allegro/OrCAD Design and IC Packaging Seminar is on the road this month, perhaps coming to a location near you:
- Colorado Springs, CO – 10/11
- Columbia, MD – 10/18 (OrCAD only)
- Durham, NC – 10/20
- Shoreview, MN – 10/27
These are full-day free seminars and there are two concurrent tracks, depending on whether you’re using Allegro or OrCAD pcb-design software (except in Columbia, MD, as noted above). Breakfast and lunch are in there too.
What’s the payoff? Some current users have seen design-time improvements of 30% to 80% using these tools and the additional automation. That directly translates into faster time to market and lower design costs, not to mention reduced design risks because there’s more time to get things right the first time.
Sign up here.