Asymmetric, dual-core NXP LPC4300 microcontrollers split tasks between ARM Cortex-M4 and -M0 cores, cost $3.75 and up

NXP Semiconductors announced today that it is now shipping its first LPC4300 dual-core, ARM-based microcontroller—the LPC4350. This microcontroller family packs an asymmetrical pair of 32-bit RISC ARM Cores—an ARM Cortex-M4 and an ARM Cortex-M0—with both processors runing at 204MHz (up from the previously expected top speed of 150MHz). The LPC4300 microcontroller family is manufactured in NXP’s ultra-low-leakage 90nm process technology. These are low-cost parts, with unit pricing that starts at $3.75 in quantities of 10,000. The LPC4350 microcontroller has no on-chip flash but does have 264Kbytes of on-chip SRAM plus an LCD controller, 10/100 Ethernet controller, two high-speed USB hubs with one hub supporting USB 2.0 Host/Device/OTG (On The Go), a state-configurable timing control unit, a CAN controller, and a bunch of other I/O protocols. Flash-based family members will become available in 1Q 2012.

All members of the LPC4300 microcontroller family include a 32Kbyte boot ROM containing boot code and on-chip software drivers, AES-128 decryption (encryption is available on some family members), an eight-channel general-purpose DMA controller, two 10-bit ADCs and one 10-bit DAC with 400k samples/sec conversion rates, a motor-control PWM, a quadrature encoder interface, four UARTs, two Fast-mode Plus I2C ports, an I2S port, two SSP/SPI ports, a smart-card interface, four timers, a windowed watchdog timer, an alarm timer, an ultra-low power real-time clock with 256 bytes of battery powered backup registers, and as many as 146 general-purpose I/O pins.

Here’s a block diagram of the LPC4300 microcontroller family:

It’s important to realize the architectural freedom afforded by the asymmetric processor combo in the LPC4300 series. Designers have labored for years to shoehorn a growing number of tasks into one-processor microcontrollers. Real-time tasks demand speedy, low-latency response while heavy-duty processing tasks soak up processor bandwidth. There are really two mutually incompatible needs here and software developers have struggled for years to get one “expensive” processor to handle everything.

The dual-core design of NXP’s LPC4300 series permits a saner distribution of work between two code-compatible but differently-able processors. The ARM Cortex-M4 processor incorporates some extra DSP hardware such as a single-cycle MAC, some SIMD instructions, and an FPU. It’s a shame to idle these resources by tasking this processor with simple real-time integer tasks such as I/O servicing and data movement if doing so reduces the available processor bandwidth that could be used for more complex processing. That’s why the LPC4300 series incorporates a smaller ARM Cortex-M0 processor—to handle these simpler but just-as-important tasks.

Yes there’s a hardware cost for adding another processor core. But take a look at the block diagram and the laundry list of standard peripherals above. Is a second processor core really that expensive in the LXP4300 devices’ sea of on-chip resources? With family member pricing starting at $3.75 per unit in high volumes, the answer to that question must be “No!”

The trick, and there’s always a trick, is to get the two processors talking to each other. NXP is providing sample code to help out. Here’s a short video from ARM TechCon 2011 explaining that facet:

The NXP4300 series of microcontrollers is yet one more example of how multicore IC design is sweeping into all levels of chip development—from highest to lowest—and for good reasons. Multicore design is not some fad. It is not some way to sell more processor cores simply for the sake of selling more processor cores. It’s a needed design alternative made possible and economical by the rapid advance of Moore’s Law. How much additional software engineering can you justify to reduce the part cost of a $3.75 microcontroller by a few cents. Not much, in general. No one would argue that 90nm process technology is on the bleeding edge today, but the NXP4300 microcontroller series proves that there is plenty of utility in the older process nodes and that we as an industry have yet to fully tap that potential.

Finally, here’s a table of currently planned NXP LPC4300 family members:

Also, see “How about a quick and easy guide to ARM Cortex processor cores? Got one for you from ARM TechCon 2011” for a quick taxonomy of ARM Cortex processor cores like the -M4 and -M0.

About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at https://eda360insider.wordpress.com/)
This entry was posted in ARM, Cortex-M0, Cortex-M4, EDA360, Silicon Realization, SoC, SoC Realization and tagged , , , , , , , , . Bookmark the permalink.

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