ARM big.LITTLE multicore IP architecture wins a Microprocessor Report Analysts’ Choice Award

This week in the Microprocessor Report, the Linley Group announced its Analysts’ Choice Award winners and declared the ARM big.LITTLE multicore IP architecture as the best processor IP of the year:

“Designed to extend battery life by up to 70%, Big.Little Designed to extend battery life by up to 70%, Big.Little delivers both high performance and power efficiency by combining two of ARM’s newest CPU cores. The “big” core is Cortex-A15, an out-of-order design that issues three instructions per cycle at speeds of up to 2.5GHz (in TSMC’s 28nm G) and integrates up to 4MB of L2 cache. To save power on lightweight workloads, Big.Little can transfer software threads to a Cortex-A7 core. This “little” core can process workloads at a third of the energy of a Cortex-A15, using an in-order dual-issue design optimized for low power at speeds of up to 1.0GHz. The two new CPUs are architecturally identical, a requirement for symmetric multiprocessing in a Big.Little design.”

Microprocessor Report also had a big prediction for the ARM big.LITTLE multicore IP architecture:

“We expect Big.Little to eventually be adopted for most new Cortex-A15 processors that handle mixed workloads and require long battery life. For these reasons, we believe Big.Little will have a lasting impact on the way microprocessors are designed for years to come.”

For more technical information on the ARM big.LITTLE multicore IP architecture, see this prior blog post in the EDA360 Insider: “The WORD on ARM’s big.LITTLE Cortex-A15/A7 design philosophy from Jack Ganssle, a leading expert and consultant on embedded design and firmware development

About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at https://eda360insider.wordpress.com/)
This entry was posted in ARM, Cortex-A15, Cortex-A7, EDA360, IP, Low Power, Packaging, Silicon Realization, SoC, SoC Realization and tagged , , , , . Bookmark the permalink.

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