The Global Semiconductor Alliance (GSA) is sponsoring a half-day event that will drill down into three of the leading-edge IC manufacturing technologies of the coming decade: 3D (and 2.5D) IC assembly, FinFETs (or Tri-gate FETs), and silicon-on-insulator (SOI) substrates. The GSA Silicon Summit will be held on April 26 at the Computer History Museum in Mountain View, California.
The event consists of four keynotes and one panel bracketed by breakfast and lunch. The first keynote, by IBM Fellow and Chief Technologies Dr. Subramanian S Iyer, is titled “Keeping Moore’s Law Alive.” This keynote addresses all three of the technologies and how they might be combined to drive future growth in the semiconductor industry.
The second keynote is titled “The Multidimensional Landscape” and it’s all about 3D and 2.5D IC assembly technologies including TSVs (through silicon vias). Perhaps of greater interest, the talk with explore the cost issues and performance benefits.
The third keynote by Jean-Marc Chery, Senior Executive Vice President and Chief Technical Officer at STMicroelectronics, is titled “The Case for SOI Technology.” As the title suggests, Chery plans to make the case for SOI technology in mobile, data, and consumer applications.
The final keynote is by Mark Brillhart, Vice President of Technology and quality at Cisco Systems. It’s titled “The Revolutionary Scope of Multi-Gate Transistors.” Brillhart expects this technology will change the game below 32nm and hopes to convince you of the same.
A panel with the speakers will follow the four keynotes with the expectation that the panel will perform a SWOT (strengths, weaknesses, opportunities, and threats) analysis of these three technologies.
The program is free to GSA members, $50 for non-members. For more information and to register, click here.
EDA360 Insider 
Thanks for the heads up, Steve!