Is Low-Power design worth the costs? Live, sort of, from DVCon

Last week at DVCon, Cadence sponsored a low-power-themed lunch with the promise “Earn Your Degree in the Low-Power Arts and Sciences.” The panel consisted of:

  • Qi Wang, technical marketing group director, Cadence
  • Ruggero Castagnetti, distinguished engineer, LSI Corp.
  • Sushma Honnavara Prasad, design engineer, Broadcom
  • Fred Jen, engineering director, Qualcomm
  • Erich Marschner, product manager for low power verification, Mentor Graphics

I was there shooting guerilla video and could not take notes (seems like that happened frequently to me last week), so I will just refer you to Richard Goering’s excellent blog post on the topic. Worth reading.

Here’s a video recap of the panel shot with Joe Hupcey III interviewing Pete Hardee who moderated the panel:


About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at
This entry was posted in EDA360, Low Power and tagged , , , , . Bookmark the permalink.

Leave a Reply

Fill in your details below or click an icon to log in: Logo

You are commenting using your account. Log Out /  Change )

Facebook photo

You are commenting using your Facebook account. Log Out /  Change )

Connecting to %s