3D Thursday: Altera adds Avago MicroPOD optical interconnects to FPGA package to handle bidirectional 100Gbps Ethernet

This week at the Optical Fibre Communication Conference and Exposition (OFC) in Los Angeles, Altera demonstrated a specially modified Stratix IV FPGA that handled bidirectional 100Gbps Ethernet (100GbE) traffic over a pair of IC-package-mounted Avago MicroPOD multi-lane optical transceivers. The optical transceivers are mounted directly to the FPGA package using a 3D package-on-package assembly technique, which results in an incredibly small package, as optical assemblies go. Here’s a photo of the Optical FPGA package from Altera:

Each of the Avago MicroPOD optical transceivers (two are shown mounted to the Altera Stratix FPGA) transmit and receive data over a 12-fiber optical ribbon cable using PRIZM LightTurn fiber cable assemblies offered by Molex. The Avago MicroPOD transceivers are lineal descendents of the DARPA Parallel Optical Network Interconnect (PONI) project. IBM worked with Avago to enhance and miniaturize the DARPA design for use in IBM’s Power7 servers. (For more details, see Lisa Huff’s fascinating Optical Components blog “DARPAs Chip-to-Chip Optical Interconnects (C2OI) Program”.)

According to Huff’s Optical Components blog, the Avago MicroPOD optical transceivers combine 850nm VCSELs (vertical cavity surface-emitting lasers) and PIN photodiode arrays to create 12-lane, bidirectional optical ports that can drive the 12-fiber optical ribbon cable shown in the image above. Each lane can operate at data rates to 12.5Gbps for a raw aggregate bandwidth of 150Gbps in each direction over the fiber ribbon cable.

For this week’s demonstration at OFC in Los Angeles, Altera showed the FPGA driving the fiber link with 100GbE data. To get those kinds of data rates, Altera employed 3D assembly techniques so that “the electrical signal path from the I/O pad of the chip to the input of the optical transceiver has been reduced to a fraction of an inch. The shortened communication path between the I/O transceivers on the FPGA die and the optical components in the Avago MicroPOD reduces signal degradation and jitter, improves signal integrity and reduces data errors caused by parasitic elements in the signal path. As a result, the full data path through the FPGA transceivers and optical modules to achieve a bit error rate (BER) of 10-12 or better.

The Avago optical modules are not just mounted on the Altera FPGA—the FPGA provides heat sinking for the modules to keep them within their specified operating range. The FPGA also monitors the optical modules’ temperature and laser bias currents through digital diagnostic monitoring to help prevent link loss.

Here’s a photo from Altera showing the demonstration board for this remarkable FPGA:

For more information on the Avago MicroPOD modules, see this detailed White Paper

About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at https://eda360insider.wordpress.com/)
This entry was posted in 3D, EDA360, Packaging, Silicon Realization, SoC, SoC Realization and tagged , , , , , . Bookmark the permalink.

2 Responses to 3D Thursday: Altera adds Avago MicroPOD optical interconnects to FPGA package to handle bidirectional 100Gbps Ethernet

  1. Lisa Huff says:

    Great summary! Thanks for the plug for my blog Steve!

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