Chenming Hu, TSMC Distinguished Chair Professor of Microelectronics at University of California at Berkeley gave a keynote talk on FinFETs and FDSOI (fully depleted silicon on insulator) today at the GSA Silicon Summit held at the Computer History Museum in Mountain View, California. The talk was a somewhat abbreviated version of the talk he gave last year at Cadence. Rather than rewriting the blog, I invoke the mighty powers of the Web Hyperlink. You can see what the Professor said today (and last year) by clicking here:
“Are FinFETs inevitable at 20nm? “Yes, no, maybe” says Professor Chenming Hu.”
and
“Are FinFETs inevitable at 20nm? “Yes, no, maybe” says Professor Chenming Hu (Part 2)”
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Steve, for those who missed part 2 of your blog on this, which covers Professor Hu’s discussion of FD-SOI (aka UTB-SOI and ET-SOI and FD planar), it’s at https://eda360insider.wordpress.com/2011/06/20/are-finfets-inevitable-at-20nm-%E2%80%9Cyes-no-maybe%E2%80%9D-says-professor-chenming-hu-part-2/.
Thanks Adele. I’ve added the link to the body of the blog. Good catch.