Layout Dependent Effects in Advanced Nodes: Boo! Are you scared yet? FREE DAC Seminar helps calm the nerves

You can change transistor threshold voltages on advanced-node designs just by placing them too near something else. (Scholarly paper with detailed analysis here.) You can solve this problem with overdesign but there are better ways. Layout-dependent effects and smart ways to mitigate them are the topics of a lunch discussion at DAC, being sponsored by Cadence and STMicroelectronics. During this discussion, you’ll learn what works—in practice. And yes, lunch is included.


  • Date: Monday, June 4
  • Time: 12-1 pm (lunch starts at 11:30am)
  • Place: Moscone Convention Center, San Francisco, Rooms 270-276

First come, first served.

More info here.

Register here.


About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at
This entry was posted in EDA360, Silicon Realization and tagged , , . Bookmark the permalink.

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