Friday Video + 3D Thursday: Xilinx Virtex-7 H580T uses 3D assembly to merge 28Gbps xceivers, FPGA fabric

The first 3D part in the Xilinx Virtex-7 FPGA family—the 2000T—permitted the construction of a huge FPGA while sidestepping the yield issues of large 28nm die. Now, Xilinx has used 3D IC assembly to meld two FPGA logic slices and a high-Gbps multi-transceiver die into another part: the Virtex-7 H580T. The result is a 3D device with 870K logic cells, as many as sixteen 28Gbps serial transceivers, and as many as seventy two 13Gbps transceivers.

Here’s a graphic showing how the two FPGA logic slices and the transceiver die attach to the silicon interposer that acts as the substrate for the Xilinx Virtex-7 H580T.

And here’s a video that explains a lot of what’s going on in this product and how 3D IC assembly helps:

For more information on the Xilinx Virtex-7 2000T, see “Generation-jumping 2.5D Xilinx Virtex-7 2000T FPGA delivers 1,954,560 logic cells, consumes only 20W

About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at https://eda360insider.wordpress.com/)
This entry was posted in 2.5D, 28nm, 3D, EDA360, FPGA, Silicon Realization, SoC, SoC Realization, System Realization and tagged , , , , . Bookmark the permalink.

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