Gary Smith proposes a 3-layer taxonomy for platform-based SoC design—Live from DAC 2012

EDA’s chief analyst Gary Smith is high on IP subsystems—big ones. Only Gary calls them platforms. Why is Smith so enthusiastic? Because, as he says, he was wrong last year in his estimates of how much it costs to develop advanced SoCs. Instead of $75 million for the design of a high-end mobile SoC, this year’s figure was $39.8 million, which Smith says is getting closer to the $25 million threshold that would turn on the VC investment spigot for funding startup fabless semiconductor firms. Smith explained that three companies called to tell him he was wrong after last year’s pronouncement at DAC and so Smith dug in.

What he found was the real way that design teams are approaching SoC development. They’re not starting every chip from scratch, as we all knew already. Instead, they’re using platforms and Smith has created a 3-layer taxonomy of platforms. At the bottom of Smith’s taxonomy is the Functional Platform, which includes a microprocessor core or cores, an interconnect fabric or bus, and some software development tools. There’s no competitive advantage in this taxonomy level, says Smith, because it’s not industry specific. Examples of well-established functional platform vendors include ARM and Intel.

One level up in the taxonomy is the Foundation Platform. These platforms take the elements from the Functional Platform and add blocks for specific markets such as mobile, consumer, automotive, or industrial. Examples of Foundation Platforms include the TI OMAP, Qualcomm Snapdragon, Nvidia Tegra, and Marvell Armada. These platforms may be specific to market niches but can still be used by several players within each niche because there’s no competitive advantage at this level either.

The Functional and Foundation Platforms consume 75-90% of the gates on an SoC. The platforms are large IP blocks with software that can be reused many times, which is where the cost savings originate. These platforms are pre-verified and come with verification IP for use after the final SoC is developed.

Finally, Smith posits Application Platforms, which is where the hardware differentiation occurs. Examples of application platforms might be in-car navigation, infotainment, or network security. These platforms can be one-off, specialized hardware blocks that perform functions more quickly than can be achieved by running software on processors lower in the platform taxonomy. Also, said Smith, Application Platforms may have the shortest product lifetime. If one of these Application Platforms gains traction in a market, it may well migrate down to the Foundation Platform level and then to the Functional Platform level in successive design generations.

Smith detailed all of this on Sunday night at his Annual DAC kickoff presentation. He saved the stunner, in my opinion, for his reprise of the platform discussion during his annual Monday morning DAC kickoff on the exhibit floor. After repeating his platform talk, Smith then said that Design Compiler was challenged by multi-platform design. Why? Because “much of the RTL code becomes ‘don’t touch.’” A lot of the design is already done for you, which means that you don’t need all of the bells and whistles included with Design Compiler. Instead, “you want speed and capacity,” said Smith.

Put that on your platform and smoke it.

For another look at Gary Smith’s remarks, see Richard Goering’s blog post “Gary Smith at DAC 2012: Multi-Platform Design and the $40M System on Chip

About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at https://eda360insider.wordpress.com/)
This entry was posted in DAC, IP, SoC, SoC Realization, System Realization, Texas instruments and tagged , , , , , , , , . Bookmark the permalink.

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