3D Thursday (Late): Sony to invest 80 billion Yen in stacked CMOS sensor manufacturing expansion

Quoting a corporate press release, the Web site www.dpreview.com reports that Sony Corp intends to invest approximately 80 billion Yen through the end of March, 2014 to expand its capacity to manufacture “stacked silicon sensors,” which are 3D IC assemblies using two semiconductor die. One die is a thinned, back-illuminated CMOS image sensor and the other die contains the signal-processing circuitry for the pixels. More technical information about the Sony stacked-silicon imaging sensors can be found here.

It’s a little known fact that these 3D IC assemblies have been in volume production for a while and are widely used in the low-cost imagers used, for example, in mobile phone handsets and tablets. Target total capacity is 60,000 wafers/month by the end of September, 2013. The manufacturing plant is located in Nagasaki, Japan where three fabs are involved in the expansion plan.


About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at https://eda360insider.wordpress.com/)
This entry was posted in 3D, EDA360, Silicon Realization, SoC, SoC Realization and tagged , , , . Bookmark the permalink.

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