Friday Video: EDA360 Insider talks HW/SW Codesign and Xilinx Zynq Dev Board with ChipEstimate.TV at DAC

I spent a few minutes with Sean O’Kane of ChipEstimate.TV at DAC earlier this month talking about system design, HW/SW codesign, and the new Avnet Dev Board for the Xilinx Zynq-7000 EPP. Here’s the video:

About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at
This entry was posted in DAC, EDA360, Silicon Realization, SoC, SoC Realization, System Realization and tagged , . Bookmark the permalink.

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