Category Archives: 10nm

ARM, TSMC announce collaboration on FINfet-based ARM v8 processor core for sub-20nm SoC designs

Today, ARM and TSMC announced a multi-year deal to develop a 64-bit ARM v8 processor “beyond” the 20nm node using FINfets. The collaboration includes the ARMv8 architecture, ARM Artisan physical IP, and TSMC’s FinFET process technology. The target of this … Continue reading

Posted in 10nm, 14nm, 20nm, ARM, EDA360, Silicon Realization, SoC, SoC Realization | Tagged , , | Leave a comment

Hear IBM’s Dr. Gary Patton on the future of silicon scaling…and beyond. (Audio from The Common Technology Platform Forum keynote)

Earlier this year, Dr. Gary Patton, Vice President of IBM’s Semiconductor Research and Development Center, spoke about the future of semiconductor scaling and beyond. It was a terrific keynote speech at the Common Platform Technology Forum and was similar to … Continue reading

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Scaling the peaks to look at the 14nm cliff, Part 2: Tom Beckley from Cadence explains how we’re getting to 20nm and then on to 14nm and 10nm

This week at the ISQED Symposium in Silicon Valley, Tom Beckley who is the Senior VP of R&D for Custom IC and Signoff at Cadence opened the conference with a keynote covering  the industry’s challenges and progress at 20nm and … Continue reading

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3D Thursday: TSMC talks more about Moore, More than Moore, and 3D ICs at CDNLive!

Rick Cassidy, president of TSMC North America, gave a keynote speech at CDNLive! Silicon Valley this week and discussed 3D IC assembly in the context of Moore’s Law. “I think we can actually beat Moore,” he said after discussing planar … Continue reading

Posted in 10nm, 14nm, 2.5D, 3D, CDNLive!, EDA360, Packaging, Silicon Realization, SoC, SoC Realization | Tagged , , , , | Leave a comment