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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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Top Posts
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- 3D Thursday: How Xilinx developed a 2.5D strategy for making the world’s largest FPGA and what the company might do next with the technology
- Realizing the ARM Cortex-A15: What does the road to 2.5GHz look like?
- Free Webinar teaches you how to mix C, C++, SystemC, and SystemVerilog verification models within UVM—October 20
- Download a free PDF of the Mixed-signal Methodology Guide, Chapter 1: Design Trends and Challenges
- Friday Video: Circuit simulation app for Android. SPICE for $10, runs in your hand? Well, almost.
- 3D Thursday: Micron to present Hybrid Memory Cube status at EDPS in Monterey, April 6—there’s a lot of news
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Category Archives: Analog
20nm design: What have we learned so far?
Even if you are not currently considering 20nm design, you owe it to yourself to download and read a new 9-page White Paper titled “A Call to Action: How 20nm Will Change IC Design” to learn about some tectonic shifts … Continue reading
FREE Webinar on analog verification. Wednesday, May 9 at 9:00 am PST
Analog blocks are usually verified at the block level many things still go wrong with connectivity and control of the analog circuit at the SoC level. It’s not enough to integrate these analog blocks into digital simulations; you need to … Continue reading
Posted in Analog, EDA360, Mixed Signal, Silicon Realization, Verification
Tagged AMS, Analog, Mixed Signal, SV-AMS, SystemVerilog, verification
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