Category Archives: CDNLive!

Friday Video: More than the legal limit of fun with a rugged, go-anywhere camcorder?

Posted on March 16, 2012 by sleibson2

This week at CDNLive!, Cadence President and CEO Lip-Bu Tan used a video from GoPro in his keynote speech. (For a summary of this speech, see “CDNLive! – Lip-Bu Tan Keynote Cites Semiconductor Growth Drivers” by Richard Goering.) In case … Continue reading →

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3D Thursday: TSMC talks more about Moore, More than Moore, and 3D ICs at CDNLive!

Posted on March 15, 2012 by sleibson2

Rick Cassidy, president of TSMC North America, gave a keynote speech at CDNLive! Silicon Valley this week and discussed 3D IC assembly in the context of Moore’s Law. “I think we can actually beat Moore,” he said after discussing planar … Continue reading →

Posted in 10nm, 14nm, 2.5D, 3D, CDNLive!, EDA360, Packaging, Silicon Realization, SoC, SoC Realization | Tagged , , , , | Leave a comment

By the numbers: 20nm (and 40nm, 32nm, 28nm, and 14nm) design to be discussed in technical detail at next week’s CDNLive! conference in Silicon Valley

Posted on March 5, 2012 by sleibson2

There’s still time to register for CDNLive!, which is being held on March 13 and 14 at the Doubletree Hotel in San Jose, California so let me give you a few numbers to whet your appetite: 40nm, 32nm, 28nm, 20nm, … Continue reading →

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CDN Live covers the gamut of IC design on March 13 and 14 in San Jose. Register Now.

Posted on January 12, 2012 by sleibson2

Registration for CDN Live—the 2-day technical conference for Cadence users being held on March 13 and 14 in San Jose—has just gone <er> live. Before I give you the link, I wanted to let you know about some of the … Continue reading →

Posted in 20nm, 28nm, 32nm, CDNLive!, EDA360, Silicon Realization, SoC Realization, System Realization | 1 Comment

ARM adds ARM Cortex-A15 and Cortex-R5 models to Fast Models 6.1 release, making these cores immediately available to System Realization teams

Posted on July 27, 2011 by sleibson2

ARM’s latest release of its Fast Models (v6.1) adds support for the ARM Cortex-A15 and Cortex-R5 processor cores. Fast Models are a real boon to System Realization teams because they provide a very easy way to test out large amounts … Continue reading →

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Watch Cadence EDA360 Evangelist Steve Leibson’s interview with John Donovan at CDNLive! Silicon Valley

Posted on December 9, 2010 by sleibson2

John Donovan, the proprietor of http://www.low-powerdesign.com, recently interviewed four Cadence representatives at the CDNLive! event held at the Fairmont Hotel in downtown San Jose, California. In this third video interview, Cadence EDA360 Evangelist and Marketing Director Steve Leibson discusses some … Continue reading →

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Watch Cadence Product Marketing Director Pete Hardee’s (Mr. Low Power) interview with John Donovan at CDNLive! Silicon Valley

Posted on December 9, 2010 by sleibson2

John Donovan, the proprietor of http://www.low-powerdesign.com, recently interviewed four Cadence representatives at the CDNLive! event held at the Fairmont Hotel in downtown San Jose, California. In this third video interview, Cadence Product Marketing Director Pete Hardee’s (Mr. Low Power) ponders … Continue reading →

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Watch Cadence Group Director Dave Desharnais’ Silicon Realization interview with John Donovan at CDNLive! Silicon Valley

Posted on December 9, 2010 by sleibson2

John Donovan, the proprietor of http://www.low-powerdesign.com, recently interviewed four Cadence representatives at the CDNLive! event held at the Fairmont Hotel in downtown San Jose, California. In this second video interview, Cadence Group Director Dave Desharnais explains the issues associated with … Continue reading →

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Watch Cadence CMO John Bruggeman’s EDA360 interview with John Donovan at CDNLive! Silicon Valley

Posted on December 9, 2010 by sleibson2

John Donovan, the proprietor of http://www.low-powerdesign.com, recently interviewed four Cadence representatives at the CDNLive! event held at the Fairmont Hotel in downtown San Jose, California. In this first video interview, Cadence CMO John Bruggeman provides an overview of EDA360, discusses … Continue reading →

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How do you get a processor to tape out at 2.4 GHz? Silicon Realization

Posted on November 15, 2010 by sleibson2

In the ramp-up to CDNLive! India this week, ASIC- and chip-design house Open-Silicon announced today that it has successfully taped out a processor design that will run at 2.4GHz using the end-to-end Cadence Silicon Realization product line. “We have fine … Continue reading →

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CDNLive! Silicon Valley: Sold Out, Wait List only

Posted on September 29, 2010 by sleibson2

Cadence will be holding this year’s CDNLive! Silicon Valley at the San Jose Fairmont on October 26. Unfortunately, registration hit capacity quickly, before I had a chance to blog the event. However, there’s a CDNLive! wait list and you can … Continue reading →

Posted in CDNLive!, EDA360, Silicon Realization, SoC Realization, System Realization | 1 Comment