Category Archives: Design Abstraction

20nm design: What have we learned so far?

Posted on July 10, 2012 by sleibson2

Even if you are not currently considering 20nm design, you owe it to yourself to download and read a new 9-page White Paper titled “A Call to Action: How 20nm Will Change IC Design” to learn about some tectonic shifts … Continue reading →

Posted in 20nm, 28nm, AMS, Analog, ARM, Design Abstraction, EDA360, Silicon Realization, Verification | Tagged , , , , , , , | 1 Comment

High-level synthesis, C versus assembly code, and Leibson’s Law

Posted on June 26, 2012 by sleibson2

Years ago, when I was Editor-in-Chief of EDN Magazine, I coined (but did not name) Leibson’s Law: “It takes 10 years for any disruptive technology to become pervasive in the design community.” I was reminded of that observation while reading … Continue reading →

Posted in Design Abstraction, EDA360, SoC, SoC Realization, System Realization, SystemC | Tagged , , , , | Leave a comment

Scaling the peaks to look at the 14nm cliff, Part 2: Tom Beckley from Cadence explains how we’re getting to 20nm and then on to 14nm and 10nm

Posted on March 22, 2012 by sleibson2

This week at the ISQED Symposium in Silicon Valley, Tom Beckley who is the Senior VP of R&D for Custom IC and Signoff at Cadence opened the conference with a keynote covering  the industry’s challenges and progress at 20nm and … Continue reading →

Posted in 10nm, 14nm, 20nm, 28nm, Design Abstraction, Design Intent, DFM, Double Patterning, EDA360, IBM, Silicon Realization | Tagged , , , , , , , , | Leave a comment

Latest version of SystemC, IEEE 1666-2011, now supports TLM 2.0

Posted on November 30, 2011 by sleibson2

Chocolate and peanut butter go together. So do SystemC and transaction-level modeling. Just not officially. Until now. Earlier this month, the IEEE Standards Board approved a revision to the IEEE 1666 SystemC standard to bring the widely used OSCI (Open … Continue reading →

Posted in Design Abstraction, EDA360, SoC Realization, System Realization, SystemC, TLM | Tagged , , , , , , | Leave a comment

What will EDA and chip design look like in the year 2020? Prognostications from the ICCAD panel

Posted on November 8, 2011 by sleibson2

Last night, half a dozen ICCAD panelists attacked the topic “2020 Vision: What the recent history of EDA will look like in nine years.” That’s such a convoluted and hard-to-parse title that the panelists chose to discuss the state of … Continue reading →

Posted in 20nm, 28nm, 3D, DAC, Design Abstraction, EDA360, Silicon Realization, SoC, SoC Realization, System Realization | Tagged , | 4 Comments

Learn how an analog design flow can boost your IC design productivity…FREE (Breakfast and Lunch too!)

Posted on September 28, 2011 by sleibson2

You’ve got just a few days only before the new series of free technical seminars on analog design flows for analog, mixed-signal, and custom designs can boost your team’s design productivity. The key to boosting design productivity is reducing design … Continue reading →

Posted in Design Abstraction, Design Convergence, Design Intent, EDA360, Silicon Realization | Tagged , | Leave a comment

“Welcome to the era of Smart Devices”says Intel’s Gadi Singer. Are you ready for the design competition?

Posted on June 9, 2011 by sleibson2

Intel’s Gadi Singer (vice president and general manager of Intel’s SoC Enabling Group) gave the keynote presentation at DAC 2011 yesterday and he discussed the evolution of electronic devices into vehicles that deliver experiences. To do this, these devices must … Continue reading →

Posted in Android, Design Abstraction, Design Convergence, Design Intent, EDA360, Silicon Realization, SoC Realization, System Realization | Tagged | Leave a comment

“Professor” Aart de Geus gives latest Techonomics lecture on collaboration and System Realization at the Semico Summit in Scottsdale

Posted on May 9, 2011 by sleibson2

Last week, Synopsys Chairman of the Board and CEO Aart de Geus gave a keynote at the Semico Summit in Scottsdale. His topics were “Techonomics,” collaboration, and systemic complexity. Techonomics is de Geus’ name for the fusion of technology and … Continue reading →

Posted in Apps, Design Abstraction, Design Convergence, Design Intent, Ecosystem, EDA360, System Realization | Tagged , , | Leave a comment

What’s driving 3D IC design? Do 2D EDA tools need a total overhaul to support 3D design?

Posted on April 12, 2011 by sleibson2

The Electronic Design Process Symposium (EDPS) held last week in Monterey devoted most of Friday to a discussion of 3D design. I’ll be devoting several EDA360 Insider blog entries to this important topic. Today’s entry summarizes the presentation by Rahul … Continue reading →

Posted in 3D, Design Abstraction, Design Convergence, Design Intent, EDA360, Low Power, Packaging, Silicon Realization, SoC Realization, System Realization, Verification | Leave a comment