Category Archives: EDA360

3D Thursday will return next week

This week is being consumed by the Flash Memory Summit. 3D Thursday will return next week. Thanks for standing by. Advertisements

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Nikon announces Android-powered camera: the $349 Coolpix S800c

Nikon has just announced an Android-powered point-and-shoot camera—the $349 Coolpix S800c. It’s a 16Mpixel camera with a 10x optical zoom but the real innovation appears on the back in the form of a touch-panel LCD 0.8Mpixel OLED display that is … Continue reading

Posted in Android, ARM, Cortex-A9, EDA360, Linux, Mobile, System Realization | Tagged , , , , , , , | 2 Comments

How Skyera developed the 44Tbyte, enterprise-class Skyhawk SSD from the ground up. A System Realization story.

I rarely get to tell an in-depth System Realization story like this one. The development of the 44Tbyte, enterprise-class Skyhawk SSD starts with a clear picture of the objective—build an enterprise-class, solid-state storage server using commercial MLC (multi-level cell) NAND … Continue reading

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Raspberry Pi + Canon = Camera Pi: ARM 11 and Linux hack of a Canon 5D Mk II DSLR

Here’s a link to a very interesting and cool hack of a Canon 5D Mk II DSLR achieved by stuffing a Raspberry Pi Linux-based single-board computer into an accessory battery grip. EDA360 Insider has covered the Raspberry Pi board before. … Continue reading

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Daniel Nenni at SemiWiki publishes a [very] brief history of the SoC

Daniel Nenni has just posted a very brief history of the SoC, with heavy emphasis on SoCs for mobile products. The emphasis is probably warranted because mobile designs really have driven SoC design for the past decade. One of the … Continue reading

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Which Android Phones are winning in Asia, and where?

This is too cool! Animoca publishes games for Android-based platforms and, apparently, collects information about what type of platform a game is downloaded into. So the company just published an analysis titled “Animoca data: the top Android phones in key … Continue reading

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Friday Video: Mars Rover video goes viral—We’re NASA and We Know it

Hip Hop and NASA? Whoda’ thunk it? Some fevered brain saw the connection between NASA and LMFAO.

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Friday Video: A brief history of PDAs with system-design tips through three teardowns

Once more, Australia’s Dave Jones has produces an eminently watchable and helpful video where he tears down three PDAs from 1986, 1996, and 2004: A Psion Organiser, a US Robotics Palm Pilot 5000, and an HP iPaq. Over two decades, … Continue reading

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Friday [not quite a] Video: Slideshow of old Packard manufacturing plant set to music

The Packard Motor Company made automobiles in Detroit for decades and closed the doors of its manufacturing plant in 1958 after going bankrupt. Although the 95-building complex closed more than half a century ago, it’s still there (for now), decaying, … Continue reading

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Download a free PDF of the Mixed-signal Methodology Guide, Chapter 1: Design Trends and Challenges

A couple of days ago, I let you know that Cadence had just published a comprehensive book on mixed-signal SoC design and verification. The book’s title is the “Mixed-Signal Methodology Guide,” written by the top mixed-signal design experts from across … Continue reading

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Samsung Exynos 5 Dual mobile processor features two 1.7GHz ARM Cortex-A15 processors, a WQXGA display controller, and two LPDDR3 controllers to feed ‘em

This past weekend, the Web was abuzz with last week’s unveiling of Samsung’s Exynos 5 Dual mobile processor. This SoC features two 1.7GHz ARM Cortex-A15 processors rather than the previous Exynos generation Dual mobile processor that incorporated two 1.4GHz ARM … Continue reading

Posted in Cortex-A15, EDA360, Samsung, Silicon Realization, SoC, SoC Realization | Tagged , , , , | Leave a comment

Friday Video: First flight of NASA Morpheus VTOL lander ends quickly and badly

The first untethered flight of NASA’s Morpheus vertical takeoff and landing vehicle ended quickly and badly. And then Morpheus exploded. As explained by the person who posted the following video on YouTube, “It appears to have had a guidance failure.” … Continue reading

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Looking for an introductory Verilog book? How’s $24.95 sound?

Bob Zeidman, founder and president of Zeidman Consulting, has just published the third edition of his book “Introduction to Verilog.” It was first published a dozen years ago and is based on the Verilog seminars that Zeidman has given at … Continue reading

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Xilinx takes Zynq to 11—or more precisely to 1GHz

In the satirical 1984 movie “This is Spinal Tap,” Nigel the guitarist explains why the volume controls on his Marshall amps go to 11 instead of 10 like everyone else’s amps: “If we need that extra push over the cliff,” … Continue reading

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How many SSDs does it take to saturate PCIe Gen 3? Would you believe 16 drives?

It’s now possible to conduct some interesting performance tests on real PCIe Gen 3 products and the video below shows you a PCIe Gen 3 RAID card talking to 16 SSDs, which is the number of drives needed to saturate … Continue reading

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How to program all of those SoC processor cores? Answers from Jim Ready. Free event, September 18.

While we can stamp out processors galore on an advanced-node SoC, programming those processors is another matter entirely. Yet “multicore” and “many-core” SoC designs are the in-vogue approach to processing performance. How to solve this dilemma? Get a glimpse of … Continue reading

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Cavium “Thunders” approval of 64-bit ARM v8 processor cores for cloud and server apps

In an unusual press release, network processor vendor Cavium has revealed plans for Project Thunder,” which will develop a family of multi-core SoCs based on the 64-bit ARM v8 processor architecture. The processors will be full-custom cores based on the … Continue reading

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3D Thursday: Wide I/O and TSVs have a ripple effect on the DRAM controller. Who knew?

Currently, the JEDEC Wide I/O DRAM specification looks to be the biggest driving force behind the adoption of 3D IC assembly. The 512-bit data maw of a Wide I/O SDRAM provides high bandwidth with low power levels, both excellent arguments … Continue reading

Posted in 2.5D, 3D, DAC, EDA360, IP, Silicon Realization, SoC, SoC Realization, System Realization, TSV, Wide I/O | Tagged , , , , , | Leave a comment

Want to hear EDA entrepreneur Jim Hogan grill a few EDA execs on October 17?

OK, the next installment of the Jim Hogan Emerging Companies jam session is scheduled for October 17 at Cadence Design Systems in San Jose. This is the cool series of conversations where serial EDA entrepreneur Jim Hogan wears a Hawaiian … Continue reading

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Friday Video: Dave Jones, That Crazy Aussie Bloke, tears down a Google Nexus 7 tablet. You know you have been waiting to see this

Every Tuesday, Dave Jones—aka “That Crazy Aussie Bloke” and the proprietor of EEVblog.com—tears down one or more tech items. This week, the subject of his ministrations is the new Google Nexus 7 tablet. There are many interesting system aspects of … Continue reading

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3D Thursday: Will water cooling for 3D IC assemblies ever be practical?

Last week, Brian Bailey published an interview with Professor Madhavan Swaminathan who is the Director of the Interconnect and Packaging Center (IPC) at Georgia Tech in Atlanta. The topic of the interview was cooling of 3D IC devices. It’s no … Continue reading

Posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization | Tagged , , , , , , , , | Leave a comment

3D Thursday: Magnificent Max explains 3D IC in simple terms

If you’re looking for simplified explanations of technical topics, few people write them as well as Clive “Max” Maxfield. His simplified 3-page explanation of 3D IC assembly is here. (Note: Registration needed to go past page 1, unfortunately.)

Posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization | Tagged , | Leave a comment

Can 1000 processors dance on the head of a pin? MIT’s Professor Srini Devadas hopes so

Veteran EDA industry watcher Peggy Aycinena visited MIT recently and spoke with Professor Srini Devadas about a manycore processor project called “Angstrom.” The purpose of the project is to develop massively parallel hardware—as in 1024 processors—to explore better ways of … Continue reading

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ARM, TSMC announce collaboration on FINfet-based ARM v8 processor core for sub-20nm SoC designs

Today, ARM and TSMC announced a multi-year deal to develop a 64-bit ARM v8 processor “beyond” the 20nm node using FINfets. The collaboration includes the ARMv8 architecture, ARM Artisan physical IP, and TSMC’s FinFET process technology. The target of this … Continue reading

Posted in 10nm, 14nm, 20nm, ARM, EDA360, Silicon Realization, SoC, SoC Realization | Tagged , , | Leave a comment

Less than two days left to sign up for free PCIe and NVMe verification training Webinar from Cadence

On June 25, Cadence and EETimes Education and Training are sponsoring a training Webinar covering verification flows for SoC designs with PCIe and/or NVMe interfaces. The Webinar will cover: Verification pitfalls of the PCIe and NVMe interface protocols Best practices … Continue reading

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