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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- EDA360 and the brand new Hewlett-Packard 15C Limited Edition RPN pocket scientific calculator
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- Friday Video: Ready for a little mobile phone teardown archaeology? Dave Jones compares state of the art in 1994 (Motorola) with an evolved 2000 (Nokia)
- 20nm design: What have we learned so far?
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- 3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. Can you say “Tour de Force”?
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Category Archives: FDSOI
GSA Silicon Summit to highlight cutting-edge IC technologies: 3D IC assembly, FinFETs, and SOI. April 26, Silicon Valley
The Global Semiconductor Alliance (GSA) is sponsoring a half-day event that will drill down into three of the leading-edge IC manufacturing technologies of the coming decade: 3D (and 2.5D) IC assembly, FinFETs (or Tri-gate FETs), and silicon-on-insulator (SOI) substrates. The … Continue reading
Posted in 2.5D, 20nm, 28nm, 32nm, 3D, EDA360, FDSOI, Silicon Realization, SoC, SoC Realization
Tagged Cisco, FinFET, IBM, Intel, Multigate device, STMicroelectronics, Tri-Gate
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Power, Performance, Cost. FDSOI lets you pick any three. Want proof? How about an ARM Cortex-M0 processor core example?
Last week, the first session of the International SoC Conference focused on FDSOI (fully depleted silicon-on-insulator) IC fabrication. Now if your thinking resembles mine before I watched this presentation, you think that FDSOI is an advanced IC-fabrication process that gives … Continue reading
Posted in 20nm, ARM, Cortex-M0, FDSOI, Silicon Realization, SoC, SoC Realization
Tagged ARM, Cortex-M0, FDSOI, M0, SOI
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