Category Archives: FPGA prototyping

Itching to try out the Xilinx Zynq-7000 EPP? Ask your doctor if Zedboard is right for you

Posted on June 5, 2012 by

Avnet and Diligent have teamed up to produce a development board for the Xilinx Zynq-7000 EPP (Extensible Processing Platform), a revolutionary device that fuses a hard-core dual ARM Cortex-A9 processor complex with a fair amount of FPGA fabric. The board … Continue reading →

Posted in EDA360, FPGA, FPGA prototyping | Tagged , , | Leave a comment

Friday Video: Xilinx FPGA + 7-segment Red LED array + Eadweard Muybridge = Wow!

Posted on April 20, 2012 by

Keep watching. First impressions can deceive.

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System EDA tools attack today’s great bugaboo for SoC Realization: The Software Development Overhang

Posted on February 27, 2012 by

Today at the North American System C Users Group (NASCUG) meeting in San Jose, the Cadence Group Director of Product Marketing for System Development Frank Schirrmeister gave a really great overview and value proposition for extensive use of System Development … Continue reading →

Posted in EDA360, FPGA prototyping, SoC, SoC Realization, System Realization, SystemC, TLM, Verification, VIP, Virtual Prototyping | Tagged , , , , , , , , | 1 Comment

Want to start writing code for the two ARM Cortex-A9 processors on the Xilinx Zynq-7000 EPP right now? Virtual Platform makes it possible

Posted on October 26, 2011 by

As of today, you can start to develop application software for the Xilinx Zynq-7000 family of Extensible Processing Platforms (EPP) using a virtual prototyping platform announced today and jointly developed by Xilinx and Cadence. The virtual platform provides an accurate … Continue reading →

Posted in Apps, ARM, Cortex-A9, EDA360, FPGA prototyping, SoC Realization, System Realization, TLM, Virtual Prototyping | Tagged , , , , , | Leave a comment

Free technical seminars on FPGA-based SoC prototyping—you need this. Sign up now. Space is limited! (Except for the free Webinar)

Posted on September 27, 2011 by

For years, SoC Realization teams have used FPGA prototypes as an essential part of the design-verification process. Creating one-off FPGA prototypes is hard however, and it distracts the team from the real goal—designing the SoC. It does not need to … Continue reading →

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