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- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- 3-processor SoC for digital still cameras incorporates an ARM 1136J-S RISC processor core plus separate image and video processors
- 3D Thursday: Micron’s 3D Hybrid Memory Cube delivers more DRAM bandwidth at lower power and in a smaller form factor using TSVs
- Collaboration is key to making DFM work at 28nm and below
- 3D Thursday: A look at some genuine 3D NAND cells, courtesy of Micron
- Friday Video: How many hardware/software integration lessons can you absorb in 34 minutes?
- The DDR4 SDRAM spec and SoC design. What do we know now?
- Clock Concurrent Optimization: The Primer to the Primer—OR—Want to overcome some major functional hurdles to Silicon Realization and save a lot of power on your SoC at the same time?
- Intel’s Knut Grimsrud explains how to get another 20x improvement in SSD performance
- Where is the mainstream IC process technology today? 28nm? 40nm? 65nm?
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Category Archives: FPGA prototyping
Itching to try out the Xilinx Zynq-7000 EPP? Ask your doctor if Zedboard is right for you
Avnet and Diligent have teamed up to produce a development board for the Xilinx Zynq-7000 EPP (Extensible Processing Platform), a revolutionary device that fuses a hard-core dual ARM Cortex-A9 processor complex with a fair amount of FPGA fabric. The board … Continue reading
Friday Video: Xilinx FPGA + 7-segment Red LED array + Eadweard Muybridge = Wow!
Keep watching. First impressions can deceive.
System EDA tools attack today’s great bugaboo for SoC Realization: The Software Development Overhang
Today at the North American System C Users Group (NASCUG) meeting in San Jose, the Cadence Group Director of Product Marketing for System Development Frank Schirrmeister gave a really great overview and value proposition for extensive use of System Development … Continue reading
Want to start writing code for the two ARM Cortex-A9 processors on the Xilinx Zynq-7000 EPP right now? Virtual Platform makes it possible
As of today, you can start to develop application software for the Xilinx Zynq-7000 family of Extensible Processing Platforms (EPP) using a virtual prototyping platform announced today and jointly developed by Xilinx and Cadence. The virtual platform provides an accurate … Continue reading
Posted in Apps, ARM, Cortex-A9, EDA360, FPGA prototyping, SoC Realization, System Realization, TLM, Virtual Prototyping
Tagged ARM Cortex-A9, Cadence, Linux, Multi-core processor, SystemC, Xilinx
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Free technical seminars on FPGA-based SoC prototyping—you need this. Sign up now. Space is limited! (Except for the free Webinar)
For years, SoC Realization teams have used FPGA prototypes as an essential part of the design-verification process. Creating one-off FPGA prototypes is hard however, and it distracts the team from the real goal—designing the SoC. It does not need to … Continue reading
Posted in EDA360, FPGA prototyping, System Realization
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