Category Archives: TLM

DAC 2012: Get answers to all of your EDA questions at 78 Cadence demo suite slots

Next week (Monday, Tuesday, and Wednesday) you can get all of your EDA questions answered at the Cadence DAC demo suites. There are 78 demos over the three days covering the following EDA topics: Mixed-signal and low-power design RTL-to-GDSII design … Continue reading

Posted in DAC, EDA360, Low Power, Mixed Signal, pcb, Silicon Realization, SoC, SoC Realization, System Realization, TLM, Verification, VIP, Virtual Prototyping | Tagged , , , , , | Leave a comment

Four Significant EDA technologies of 2011 and what they mean to your IC design team

This week, Cadence celebrated the efforts of several developers who have created some very innovative technology during a private award ceremony. The reason I’m mentioning this internal event at all is because these celebrated technologies are already having a profoundly … Continue reading

Posted in EDA360, Silicon Realization, SoC, TLM, VIP, Virtual Prototyping | Tagged , , , , | Leave a comment

Free Webinar for Verification Engineers on using Structured Debug Messages. March 7.

Structured debug messages (SDMs) help verification engineers perform advanced transaction-level debugging by linking transactions throughout their environment and by linking messages to a specific transaction or to a parent transaction. SDMs also help you to visualize transactions in a debug … Continue reading

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System EDA tools attack today’s great bugaboo for SoC Realization: The Software Development Overhang

Today at the North American System C Users Group (NASCUG) meeting in San Jose, the Cadence Group Director of Product Marketing for System Development Frank Schirrmeister gave a really great overview and value proposition for extensive use of System Development … Continue reading

Posted in EDA360, FPGA prototyping, SoC, SoC Realization, System Realization, SystemC, TLM, Verification, VIP, Virtual Prototyping | Tagged , , , , , , , , | 1 Comment

IEEE Computer Society Lecture—Creating System-On-Chips: Mixing HW & SW Successfully

As soon as we started to incorporate processors on ASICs, thus instantly creating SoCs, hardware/software integration issues became fully intertwined with chip design. Today, we routinely put a dozen or more firmware-driven processing elements on our SoCs so the issues … Continue reading

Posted in EDA360, Silicon Realization, SoC, SoC Realization, System Realization, SystemC, TLM, Virtual Prototyping | Tagged , , , , | Leave a comment

Latest version of SystemC, IEEE 1666-2011, now supports TLM 2.0

Chocolate and peanut butter go together. So do SystemC and transaction-level modeling. Just not officially. Until now. Earlier this month, the IEEE Standards Board approved a revision to the IEEE 1666 SystemC standard to bring the widely used OSCI (Open … Continue reading

Posted in Design Abstraction, EDA360, SoC Realization, System Realization, SystemC, TLM | Tagged , , , , , , | Leave a comment

Want to start writing code for the two ARM Cortex-A9 processors on the Xilinx Zynq-7000 EPP right now? Virtual Platform makes it possible

As of today, you can start to develop application software for the Xilinx Zynq-7000 family of Extensible Processing Platforms (EPP) using a virtual prototyping platform announced today and jointly developed by Xilinx and Cadence. The virtual platform provides an accurate … Continue reading

Posted in Apps, ARM, Cortex-A9, EDA360, FPGA prototyping, SoC Realization, System Realization, TLM, Virtual Prototyping | Tagged , , , , , | Leave a comment

Friday Video: All about the TSMC ESL Reference Flow 12

ESL Reference Flow 12 is the latest generation TSMC reference flow for electronic system-level (ESL) design. The TSMC ESL Reference Flow 12 inserts power, performance, and area (PPA) indices into an ESL design flow, which  enables designers to explore meaningful … Continue reading

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A painless way to learn how to design and debug multicore ARM-based SoCs using SystemC and TLM 2.0

As SoCs become far more software-centric, and multicore SoCs even more so, Realization teams must prototype and debug their designs using virtual platforms before committing to the implementation phase or face the high risk of proceeding down the wrong architectural … Continue reading

Posted in ARM, EDA360, SoC Realization, System Realization, SystemC, TLM, Uncategorized, Virtual Prototyping | Tagged , , | Leave a comment