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- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- The DDR4 SDRAM spec and SoC design. What do we know now?
- Who wants more technical detail on the Altera SoC FPGA? Altera says…you!
- 3D Thursday (early): Steve’s Improbable History of 3D ICs? Six decades of 3D electronic packaging
- ARM furthers its “cover the earth” strategy with introduction of R5 and R7 core variants for fast, real-time, deterministic SoC applications
- ARM adds ARM Cortex-A15 and Cortex-R5 models to Fast Models 6.1 release, making these cores immediately available to System Realization teams
- 3D Thursday: CEA-Leti launches Open 3D IC assembly partnership program
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Tag Archives: AMS
Workshop on Analog and Mixed-Signal Design Automation: November 8 in Silicon Valley
A 1-day workshop on Analog and Mixed-Signal Design Automation will be held on November 8 in conjunction with ICCAD in Silicon Valley. It’s no secret that advanced-node process scaling makes all IC design more complex and more challenging—even more so … Continue reading
Meaty new book on Mixed-Signal SoC Design, Verification and Implementation Methodology is nearly ready
Is your current SoC project a mixed-signal design? If not, chances are good that the next one will be. That’s because there’s been an evolution in SoC design from pure digital to analog/mixed-signal (AMS) designs over the past several years … Continue reading
Smart analog/mixed-signal IC designs are—er—smarter. Learn how to stuff a 32-bit ARM Cortex-M core into an AMS design at DAC. Lunch included
In these days of the SoC, one chip has to do it all. That means both analog and digital processing. Now you can get a first-hand look at how successful design teams have integrated ARM Cortex-M processor cores in their … Continue reading
Posted in ARM, Cortex-M0, Cortex-M4, DAC, Mixed Signal, Silicon Realization, SoC, SoC Realization
Tagged AMS, ARM architecture, ARM Cortex-M, Moscone Center, San Francisco, System-on-a-chip
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FREE Webinar on analog verification. Wednesday, May 9 at 9:00 am PST
Analog blocks are usually verified at the block level many things still go wrong with connectivity and control of the analog circuit at the SoC level. It’s not enough to integrate these analog blocks into digital simulations; you need to … Continue reading
Posted in Analog, EDA360, Mixed Signal, Silicon Realization, Verification
Tagged AMS, Analog, Mixed Signal, SV-AMS, SystemVerilog, verification
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Intel says Moore’s Law alive and well and living at 32nm
One of the really interesting presentations at least week’s 8th International SoC Conference in Irvine was from Dr Jeff Parkhurst, Research Programs Manager at Intel, who spoke on the topic of “Delivering Cost-effective SoC-Based Platform Solutions.” I found the presentation … Continue reading
Posted in EDA360, IP, Silicon Realization, SoC Realization
Tagged AMS, Analog, Mixed/Signal. Intel
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