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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- 3D Thursday: Altera adds Avago MicroPOD optical interconnects to FPGA package to handle bidirectional 100Gbps Ethernet
- Qualcomm reveals more Snapdragon 4 SoC details in a White Paper. Want to know what’s inside?
- ARM drops Cortex-A7 core on unsuspecting market, devastates low-power SoC and application-processor landscapes. What’s it all mean?
- Download a free PDF of the Mixed-signal Methodology Guide, Chapter 1: Design Trends and Challenges
- How Skyera developed the 44Tbyte, enterprise-class Skyhawk SSD from the ground up. A System Realization story.
- EDA360 and the brand new Hewlett-Packard 15C Limited Edition RPN pocket scientific calculator
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- Who wants more technical detail on the Altera SoC FPGA? Altera says…you!
- By the numbers: 20nm (and 40nm, 32nm, 28nm, and 14nm) design to be discussed in technical detail at next week’s CDNLive! conference in Silicon Valley
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Tag Archives: Applied Materials
Friday Video (early): Season’s Greetings Video from Applied Materials
Here’s a way-too-cute video made by students from the Animation/Illustration’s “Shrunken Head Man Club” in San Jose State University’s Art Department, a project sponsored by Applied Materials. Who says there’s no Santa Claus?
Just how high is the 20nm design mountain of challenges?
One of the last presentations at last week’s Global Technology Conference was the talk on 20nm design challenges presented by Wei Lii Tan of Cadence. Tan first summarized the benefits of the 20nm process node relative to 28nm: 30-50% better … Continue reading
Posted in ARM, EDA360, Globalfoundries, Silicon Realization, SoC Realization
Tagged Applied Materials, Double Patterning
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