Tag Archives: Atrenta

3D Thursday: Some unexpected implications of IP subsystems coupled with 3D IC assembly

A new “Experts at the Table” conversation on the Semiconductor Manufacturing and Design Community (SMD) site about IP Subsystems among Kevin Meyer, vice president of design enablement strategy and alliances at GlobalFoundries; Steve Roddy, vice president of marketing at Tensilica; … Continue reading

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FREE DAC 2012 Exhibit 3-day passes. Limited quantity. Time-limited offer. Get ‘em NOW!

Want to go see the latest EDA offerings on the DAC exhibit floor but you (or your boss) can’t spring for the cash? Bummer. Atrenta, Cadence, and Springsoft feel your pain and once more, the three amigos have partnered to … Continue reading

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Friday Video: Atrenta joins the Cadence System Realization Alliance. Customers win

Atrenta announced this week just before ARM TechCon 2011 that it has joined the Cadence System Realization Alliance. The first result of this agreement is to ensure seamless operation of the Atrenta Spyglass platform with the Cadence C-to-Silicon Compiler. Atrenta … Continue reading

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