Tag Archives: Brian Bailey

3D Thursday: Will water cooling for 3D IC assemblies ever be practical?

Posted on July 25, 2012 by

Last week, Brian Bailey published an interview with Professor Madhavan Swaminathan who is the Director of the Interconnect and Packaging Center (IPC) at Georgia Tech in Atlanta. The topic of the interview was cooling of 3D IC devices. It’s no … Continue reading →

Posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization | Tagged , , , , , , , , | Leave a comment

Power is everything in design today. Believe it?

Posted on April 3, 2012 by

Brian Bailey has just published an article on low-power design in the EE Life section of EETimes. (See “Power 101 – Power consumption”) Here is Bailey’s premise: “Power, in my opinion, has become a game changer, not just for hardware … Continue reading →

Posted in Low Power, Silicon Realization, SoC, SoC Realization, System Realization | Tagged , , , | Leave a comment

Brian Bailey asks if hardware/software co-design is a myth or reality, then answers the question

Posted on July 31, 2011 by

Brian Bailey is a well-known consultant in the EDA industry and he’s just published a short but pithy blog on EETimes examining the state of the art in hardware/software co-design. Bailey does something I really admire in this blog. He … Continue reading →

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