Tag Archives: CMOS

3D Thursday: My breakfast with IBM’s Gary Patton leads to a discussion of 20nm and 14nm IC design

Yesterday I moderated a panel on 2(x)nm success at DAC and one of the panelists was Dr. Gary Patton, VP of IBM’s Semiconductor Research and Development Center in East Fishkill, NY. I’ve heard Dr. Patton speak before and he knows … Continue reading

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ICCAD Keynote: Design of Secure Systems – Where are the EDA Tools?

Georg Sigl has spent ten years looking at system security and developing secure ICs for a variety of applications. Starting in the year 2000, he was responsible for developing new secure microcontroller platforms in the Chip Card and Security division … Continue reading

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