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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- The DDR4 SDRAM spec and SoC design. What do we know now?
- JEDEC releases more details about DDR4 SDRAM spec. Want to know what they are?
- Friday Video: Want the basics of PCB design in 45 minutes? Dave Jones delivers yet again with a free tutorial.
- DARPA wants a more PERFECT processing engine with a 75x improvement in GFLOPS/Watt. Want to play?
- Itching to try out the Xilinx Zynq-7000 EPP? Ask your doctor if Zedboard is right for you
- 3-processor SoC for digital still cameras incorporates an ARM 1136J-S RISC processor core plus separate image and video processors
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Tag Archives: Extreme ultraviolet
Friday Video: Luigi Capodieci, a fellow at GLOBALFOUNDRIES, talks 20nm and below, EUV, FINFETs, and the state of the foundry business
Be sure to watch this excellent 13-minute interview done by Mark LePedus starring Luigi Capodieci, a fellow with GLOBALFOUNDRIES, to get a close-up-and-personal look at the state of the foundry business (it’s not dying), 20nm design, EUV in the wings, … Continue reading
Posted in 14nm, 20nm, EUV, Globalfoundries, Silicon Realization
Tagged Extreme ultraviolet, FinFET, GlobalFoundries
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3D Thursday: My breakfast with IBM’s Gary Patton leads to a discussion of 20nm and 14nm IC design
Yesterday I moderated a panel on 2(x)nm success at DAC and one of the panelists was Dr. Gary Patton, VP of IBM’s Semiconductor Research and Development Center in East Fishkill, NY. I’ve heard Dr. Patton speak before and he knows … Continue reading
Posted in 14nm, 20nm, 28nm, Double Patterning, EDA360, EUV, Silicon Realization, SoC, SoC Realization
Tagged Bipolar, CMOS, Extreme ultraviolet, FinFET, Gary Patton, IBM, Multiple patterning, TriGate
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