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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- EDA360 and the brand new Hewlett-Packard 15C Limited Edition RPN pocket scientific calculator
- RTOS pioneer Jim Ready discusses the intersection between embedded design and EDA
- EMA Design Automation announces FootprintGen—an app for Cadence Allegro and OrCAD PCB design tools that cuts the time needed to design PCB footprint models for new components
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Tag Archives: FDSOI
Professor Chenming Hu talks FinFETs and FDSOI at the GSA Silicon Summit
Chenming Hu, TSMC Distinguished Chair Professor of Microelectronics at University of California at Berkeley gave a keynote talk on FinFETs and FDSOI (fully depleted silicon on insulator) today at the GSA Silicon Summit held at the Computer History Museum in … Continue reading
Power, Performance, Cost. FDSOI lets you pick any three. Want proof? How about an ARM Cortex-M0 processor core example?
Last week, the first session of the International SoC Conference focused on FDSOI (fully depleted silicon-on-insulator) IC fabrication. Now if your thinking resembles mine before I watched this presentation, you think that FDSOI is an advanced IC-fabrication process that gives … Continue reading
Posted in 20nm, ARM, Cortex-M0, FDSOI, Silicon Realization, SoC, SoC Realization
Tagged ARM, Cortex-M0, FDSOI, M0, SOI
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3D Thursday: More words on the Intel FinFETs (this time from Ron Wilson at EETimes)
Last month, I wrote a couple of articles on FinFETs, those 3D structures coming to some 20nm chips soon to be near you—like in your PC. See “Are FinFETs inevitable at 20nm? “Yes, no, maybe” says Professor Chenming Hu (Part … Continue reading
Posted in 3D, EDA360, Silicon Realization
Tagged EETimes, FDSOI, FinFET, Intel Corporation, short-channel effects
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