Search EDA360 Insider
Hey!!! Subscribe now to the EDA360 Insider!
-
Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
EDA360 Tag Cloud
- 2.5D
- 3D
- 3D IC
- 20nm
- 28nm
- 32nm
- 40nm
- Agilent
- Altera
- AMD
- Analog
- Android
- Apple
- ARM
- ARM architecture
- ARM Cortex-A15
- ASIC
- Broadcom
- Cadence
- Canon
- Cortex
- Cortex-A15
- Cortex-M0
- DAC
- Dave Jones
- DDR3
- DDR4
- Double Patterning
- EDA
- EDPS
- Field-programmable gate array
- FinFET
- Flash
- Flash memory
- FPGA
- Freescale
- Freescale Semiconductor
- GlobalFoundries
- IBM
- Intel
- IP
- iPad
- iPhone
- JEDEC
- Jim Hogan
- Kinect
- Linux
- Low Power
- Lytro
- microcontroller
- Micron
- Microsoft
- Mixed Signal
- Multi-core processor
- Nvidia
- OrCAD
- pcb
- Printed circuit board
- Qualcomm
- Robot
- Samsung
- SDRAM
- Snapdragon
- SoC
- STMicroelectronics
- SystemC
- Texas Instruments
- TI
- TSMC
- USB
- verification
- video
- Wide I/O
- Xilinx
Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- What do you do when two processors just won’t do? TI’s OMAP 5 SoCs sport 4-in-hand ARM cores, IP Subsystems
- EDA360 and the brand new Hewlett-Packard 15C Limited Edition RPN pocket scientific calculator
- Power, Performance, Cost. FDSOI lets you pick any three. Want proof? How about an ARM Cortex-M0 processor core example?
- Scaling the 20nm peaks to look at the 14nm cliff, Part 1: Tom Beckley from Cadence maps the challenges of advanced node design at ISQED
Download the EDA360 Vision Paper here:
Tag Archives: Fujitsu
Fujitsu adopts Cadence Chip Planning System for worldwide microcontroller design. Why? “It helps us build better chips faster.” Want one?
Fujitsu is one of the world’s top 10 microcontroller vendors. To stay competitive in this crowded, $15 billion market (2011 estimate by Databeans), a microcontroller vendor must freshen its microcontroller offerings at a very rapid pace and any boost in … Continue reading
3D Thursday: Lessons learned from the IMEC’s 3D DRAM-on-logic chip design work
I recently covered the groundbreaking WIOMING 3D chip design done by CEA-Imec in conjunction with ST-Ericsson. (See “3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. … Continue reading
Need an ARM-based 32-bit microcontroller? There’s more than a few full houses on offer.
When 17 microcontroller vendors pick your processor architecture, you have a right to sing “Something’s happening here.” Alban Rampon of ARM just published a blog entry titled “ARM Cortex-M—How could you choose your microcontroller?” This blog entry lists 17 semiconductor … Continue reading
3D Thursday: IMEC prototypes 3D chip stack, finds some thermal surprises
Imec and several of its 3D integration partners (Globalfoundries, Intel, Micron, Panasonic, Samsung, TSMC, Fujitsu, Sony, Amkor, and Qualcomm) have fabricated a 3-chip 3D IC stack demonstration prototype with the intent of proving several assembly methods plus electrical characteristics and … Continue reading
Posted in 3D, Silicon Realization, SoC Realization, System Realization, TSMC, TSV
Tagged Amkor, Fujitsu, GlobalFoundries, Imec, Intel, Micron, Panasonic, Qualcomm, Samsung, Sony, TSMC
1 Comment
