Tag Archives: Fujitsu

Fujitsu adopts Cadence Chip Planning System for worldwide microcontroller design. Why? “It helps us build better chips faster.” Want one?

Posted on May 8, 2012 by

Fujitsu is one of the world’s top 10 microcontroller vendors. To stay competitive in this crowded, $15 billion market (2011 estimate by Databeans), a microcontroller vendor must freshen its microcontroller offerings at a very rapid pace and any boost in … Continue reading →

Posted in Silicon Realization, SoC, SoC Realization | Tagged , | Leave a comment

3D Thursday: Lessons learned from the IMEC’s 3D DRAM-on-logic chip design work

Posted on February 9, 2012 by

I recently covered the groundbreaking WIOMING 3D chip design done by CEA-Imec in conjunction with ST-Ericsson. (See “3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. … Continue reading →

Posted in 2.5D, 3D, EDA360, imec, SoC, SoC Realization | Tagged , , , , , , , , , , , , , , , | Leave a comment

Need an ARM-based 32-bit microcontroller? There’s more than a few full houses on offer.

Posted on August 3, 2011 by

When 17 microcontroller vendors pick your processor architecture, you have a right to sing “Something’s happening here.” Alban Rampon of ARM just published a blog entry titled “ARM Cortex-M—How could you choose your microcontroller?” This blog entry lists 17 semiconductor … Continue reading →

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3D Thursday: IMEC prototypes 3D chip stack, finds some thermal surprises

Posted on July 14, 2011 by

Imec and several of its 3D integration partners (Globalfoundries, Intel, Micron, Panasonic, Samsung, TSMC, Fujitsu, Sony, Amkor, and Qualcomm) have fabricated a 3-chip 3D IC stack demonstration prototype with the intent of proving several assembly methods plus electrical characteristics and … Continue reading →

Posted in 3D, Silicon Realization, SoC Realization, System Realization, TSMC, TSV | Tagged , , , , , , , , , , | 1 Comment