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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- 3D Thursday: Altera adds Avago MicroPOD optical interconnects to FPGA package to handle bidirectional 100Gbps Ethernet
- Qualcomm reveals more Snapdragon 4 SoC details in a White Paper. Want to know what’s inside?
- ARM drops Cortex-A7 core on unsuspecting market, devastates low-power SoC and application-processor landscapes. What’s it all mean?
- Download a free PDF of the Mixed-signal Methodology Guide, Chapter 1: Design Trends and Challenges
- How Skyera developed the 44Tbyte, enterprise-class Skyhawk SSD from the ground up. A System Realization story.
- EDA360 and the brand new Hewlett-Packard 15C Limited Edition RPN pocket scientific calculator
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- Who wants more technical detail on the Altera SoC FPGA? Altera says…you!
- By the numbers: 20nm (and 40nm, 32nm, 28nm, and 14nm) design to be discussed in technical detail at next week’s CDNLive! conference in Silicon Valley
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Tag Archives: H580T
Friday Video + 3D Thursday: Xilinx Virtex-7 H580T uses 3D assembly to merge 28Gbps xceivers, FPGA fabric
The first 3D part in the Xilinx Virtex-7 FPGA family—the 2000T—permitted the construction of a huge FPGA while sidestepping the yield issues of large 28nm die. Now, Xilinx has used 3D IC assembly to meld two FPGA logic slices and … Continue reading
Posted in 2.5D, 28nm, 3D, EDA360, FPGA, Silicon Realization, SoC, SoC Realization, System Realization
Tagged 2.5D, 28Gbps, 3D, H580T, Xilinx
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