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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- EDA360 and the brand new Hewlett-Packard 15C Limited Edition RPN pocket scientific calculator
- 10 ways to get your EDA tools to run faster, smoother, and longer
- Qualcomm reveals more Snapdragon 4 SoC details in a White Paper. Want to know what’s inside?
- Friday Video: Ready for a little mobile phone teardown archaeology? Dave Jones compares state of the art in 1994 (Motorola) with an evolved 2000 (Nokia)
- 20nm design: What have we learned so far?
- The DDR4 SDRAM spec and SoC design. What do we know now?
- 3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. Can you say “Tour de Force”?
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Tag Archives: HP
Do you think Moore’s Law has become irrelevant? “Yes,” says HP Research Fellow Stan Williams
Thanks to this article from TechEye.Net, I was alerted to an extremely interesting roundtable discussion organized by the Kavli Foundation by three long-range nanotechnology research experts. The three experts are HP Research Fellow Stan Williams, director of the company’s Cognitive … Continue reading
Posted in EDA360, Silicon Realization, System Realization
Tagged California Institute of Technology, California NanoSystems Institute, Fred Kavli, HP, Kavli Foundation, Kavli Trust, Memristor, nanotechnology, Stan Williams, University of California, University of California Los Angeles, University of New South Wales
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More news on the asymmetric processing SoC front
Back in October during ARM TechCon, Freescale announced plans to produce a family of chips based on a platform built around a pair of asymmetric processor cores: the ARM Cortex-A5 and Cortex-M4. Freescale’s dual-core approach is similar in concept to … Continue reading
Posted in ARM, Cortex-A5, Cortex-M4, EDA360, SoC, SoC Realization, System Realization
Tagged 9845, ARM architecture, Freescale, HP, Multi-core processor, NXP Semiconductors
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PCI Express takes on Apple/Intel Thunderbolt and 16 Gtransfers/sec at PCI SIG while PCIe Gen 3 starts to power up
Two articles from EETimes give an exciting picture for PCI Express’ short- and long-term future. On the most immediate front, 23 adapter cards and 19 systems from PC and peripheral makers participated in the most recent PCIe Gen 3 plugfests. … Continue reading
Posted in EDA360, Silicon Realization, SoC Realization, System Realization
Tagged Advanced Micro Devices, HP, IBM, Intel, Intel Corporation, PCI Express, PCI SIG
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Friday Video: Think apps are just for pads and phones? Think again–CNET video review of HP D110a printer
It’s easy to see how apps are good for pads and phones, now that we’ve got years of examples to learn from. However, apps are going into far more products that those two. Take printers for example. Here’s a CNET … Continue reading
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